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authorTom Stellard <[email protected]>2012-05-08 13:08:29 -0400
committerTom Stellard <[email protected]>2012-05-08 15:47:46 -0400
commita8d82c44f79e27d2b78458f9ea560c73eef3d3b5 (patch)
tree8ccab60297b2cb83e80eba498a0e048a325311f7 /src/gallium/drivers/radeon/AMDGPUInstructions.td
parent8a4c25dd7e9002ab7a2821753bcae1ff6af2ca1c (diff)
radeon/llvm: Remove the EXPORT_REG instruction
Diffstat (limited to 'src/gallium/drivers/radeon/AMDGPUInstructions.td')
-rw-r--r--src/gallium/drivers/radeon/AMDGPUInstructions.td7
1 files changed, 0 insertions, 7 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUInstructions.td b/src/gallium/drivers/radeon/AMDGPUInstructions.td
index a5ac9cdd409..ec7175a6510 100644
--- a/src/gallium/drivers/radeon/AMDGPUInstructions.td
+++ b/src/gallium/drivers/radeon/AMDGPUInstructions.td
@@ -35,13 +35,6 @@ class AMDGPUShaderInst <dag outs, dag ins, string asm, list<dag> pattern>
let isCodeGenOnly = 1 in {
- def EXPORT_REG : AMDGPUShaderInst <
- (outs),
- (ins GPRF32:$src),
- "EXPORT_REG $src",
- [(int_AMDGPU_export_reg GPRF32:$src)]
- >;
-
def MASK_WRITE : AMDGPUShaderInst <
(outs),
(ins GPRF32:$src),