diff options
| author | Tom Stellard <[email protected]> | 2012-06-05 20:10:31 -0400 |
|---|---|---|
| committer | Tom Stellard <[email protected]> | 2012-06-06 13:46:04 -0400 |
| commit | d4942eb9fa1247053619be2b1e5a1b79f35c535d (patch) | |
| tree | dbc234aba08f848d97a4be6b7b680df932fd486b /src/gallium/drivers/radeon/AMDGPUInstrInfo.h | |
| parent | edceed1b9a46c4a92a6113e8b1c5d2433568143d (diff) | |
radeon/llvm: Remove obselete hooks for the ConvertToISA pass
We can't remove this pass yet, because we need it to convert AMDIL
registers in BRANCH* instructions, but we don't need it for
instruction conversion any more.
Diffstat (limited to 'src/gallium/drivers/radeon/AMDGPUInstrInfo.h')
| -rw-r--r-- | src/gallium/drivers/radeon/AMDGPUInstrInfo.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUInstrInfo.h b/src/gallium/drivers/radeon/AMDGPUInstrInfo.h index b0d4e8a519c..e6b79c867a8 100644 --- a/src/gallium/drivers/radeon/AMDGPUInstrInfo.h +++ b/src/gallium/drivers/radeon/AMDGPUInstrInfo.h @@ -36,10 +36,6 @@ public: virtual const AMDGPURegisterInfo &getRegisterInfo() const = 0; - /// getISAOpcode - This function takes an AMDIL opcode as an argument and - /// returns an equivalent ISA opcode. - virtual unsigned getISAOpcode(unsigned AMDILopcode) const = 0; - /// convertToISA - Convert the AMDIL MachineInstr to a supported ISA /// MachineInstr virtual MachineInstr * convertToISA(MachineInstr & MI, MachineFunction &MF, |