diff options
| author | Tom Stellard <[email protected]> | 2012-05-07 15:20:26 -0400 |
|---|---|---|
| committer | Tom Stellard <[email protected]> | 2012-05-08 15:47:45 -0400 |
| commit | 52a7f212d36bd9829494bd588ecb9a3ebe9fc28a (patch) | |
| tree | 6c4bb5a2d57b80d7d8b082edfd0ae7b72e9107b6 /src/gallium/drivers/radeon/AMDGPUInstrInfo.h | |
| parent | e042b3aeed917b179d24c1f7a099c4cce56d2e25 (diff) | |
radeon/llvm: Remove the ReorderPreloadInstructions pass
Diffstat (limited to 'src/gallium/drivers/radeon/AMDGPUInstrInfo.h')
| -rw-r--r-- | src/gallium/drivers/radeon/AMDGPUInstrInfo.h | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUInstrInfo.h b/src/gallium/drivers/radeon/AMDGPUInstrInfo.h index fa009bc6302..ad135d46cb3 100644 --- a/src/gallium/drivers/radeon/AMDGPUInstrInfo.h +++ b/src/gallium/drivers/radeon/AMDGPUInstrInfo.h @@ -41,19 +41,9 @@ namespace llvm { virtual MachineInstr * convertToISA(MachineInstr & MI, MachineFunction &MF, DebugLoc DL) const; - bool isRegPreload(const MachineInstr &MI) const; - #include "AMDGPUInstrEnums.h.include" }; } // End llvm namespace -/* AMDGPU target flags are stored in bits 32-39 */ -namespace AMDGPU_TFLAG_SHIFTS { - enum TFLAGS { - PRELOAD_REG = 32 - }; -} - - #endif // AMDGPUINSTRINFO_H_ |