diff options
author | Tom Stellard <[email protected]> | 2012-05-24 09:28:44 -0400 |
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committer | Tom Stellard <[email protected]> | 2012-05-24 14:12:32 -0400 |
commit | d088da917bb3495491b9a5da5ca1716ddd91ddd5 (patch) | |
tree | 04e6db13a10f4eea63067429781fcb398cc0d915 /src/gallium/drivers/radeon/AMDGPUInstrInfo.h | |
parent | 662ccbfc21a650e0a52f6d293fa33f9e23e654c6 (diff) |
radeon/llvm: Remove auto-generated AMDIL->ISA conversion code
Diffstat (limited to 'src/gallium/drivers/radeon/AMDGPUInstrInfo.h')
-rw-r--r-- | src/gallium/drivers/radeon/AMDGPUInstrInfo.h | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUInstrInfo.h b/src/gallium/drivers/radeon/AMDGPUInstrInfo.h index 0f3698930a9..b0d4e8a519c 100644 --- a/src/gallium/drivers/radeon/AMDGPUInstrInfo.h +++ b/src/gallium/drivers/radeon/AMDGPUInstrInfo.h @@ -30,7 +30,6 @@ class MachineInstrBuilder; class AMDGPUInstrInfo : public AMDILInstrInfo { private: AMDGPUTargetMachine & TM; - std::map<unsigned, unsigned> amdilToISA; public: explicit AMDGPUInstrInfo(AMDGPUTargetMachine &tm); @@ -39,14 +38,13 @@ public: /// getISAOpcode - This function takes an AMDIL opcode as an argument and /// returns an equivalent ISA opcode. - virtual unsigned getISAOpcode(unsigned AMDILopcode) const; + virtual unsigned getISAOpcode(unsigned AMDILopcode) const = 0; /// convertToISA - Convert the AMDIL MachineInstr to a supported ISA /// MachineInstr virtual MachineInstr * convertToISA(MachineInstr & MI, MachineFunction &MF, DebugLoc DL) const; - #include "AMDGPUInstrEnums.h.include" }; } // End llvm namespace |