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authorTom Stellard <[email protected]>2012-05-24 09:28:44 -0400
committerTom Stellard <[email protected]>2012-05-24 14:12:32 -0400
commitd088da917bb3495491b9a5da5ca1716ddd91ddd5 (patch)
tree04e6db13a10f4eea63067429781fcb398cc0d915 /src/gallium/drivers/radeon/AMDGPUInstrInfo.cpp
parent662ccbfc21a650e0a52f6d293fa33f9e23e654c6 (diff)
radeon/llvm: Remove auto-generated AMDIL->ISA conversion code
Diffstat (limited to 'src/gallium/drivers/radeon/AMDGPUInstrInfo.cpp')
-rw-r--r--src/gallium/drivers/radeon/AMDGPUInstrInfo.cpp58
1 files changed, 1 insertions, 57 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUInstrInfo.cpp b/src/gallium/drivers/radeon/AMDGPUInstrInfo.cpp
index 2d683c7bcee..3c94c3da817 100644
--- a/src/gallium/drivers/radeon/AMDGPUInstrInfo.cpp
+++ b/src/gallium/drivers/radeon/AMDGPUInstrInfo.cpp
@@ -21,52 +21,7 @@
using namespace llvm;
AMDGPUInstrInfo::AMDGPUInstrInfo(AMDGPUTargetMachine &tm)
- : AMDILInstrInfo(tm), TM(tm)
-{
- const AMDILDevice * dev = TM.getSubtarget<AMDILSubtarget>().device();
- for (unsigned i = 0; i < AMDIL::INSTRUCTION_LIST_END; i++) {
- const MCInstrDesc & instDesc = get(i);
- uint32_t instGen = (instDesc.TSFlags >> 40) & 0x7;
- uint32_t inst = (instDesc.TSFlags >> 48) & 0xffff;
- if (inst == 0) {
- continue;
- }
- switch (instGen) {
- case AMDGPUInstrInfo::R600_CAYMAN:
- if (dev->getGeneration() > AMDILDeviceInfo::HD6XXX) {
- continue;
- }
- break;
- case AMDGPUInstrInfo::R600:
- if (dev->getGeneration() != AMDILDeviceInfo::HD4XXX) {
- continue;
- }
- break;
- case AMDGPUInstrInfo::EG_CAYMAN:
- if (dev->getGeneration() < AMDILDeviceInfo::HD5XXX
- || dev->getGeneration() > AMDILDeviceInfo::HD6XXX) {
- continue;
- }
- break;
- case AMDGPUInstrInfo::CAYMAN:
- if (dev->getDeviceFlag() != OCL_DEVICE_CAYMAN) {
- continue;
- }
- break;
- case AMDGPUInstrInfo::SI:
- if (dev->getGeneration() != AMDILDeviceInfo::HD7XXX) {
- continue;
- }
- break;
- default:
- abort();
- break;
- }
-
- unsigned amdilOpcode = GetRealAMDILOpcode(inst);
- amdilToISA[amdilOpcode] = instDesc.Opcode;
- }
-}
+ : AMDILInstrInfo(tm), TM(tm) { }
MachineInstr * AMDGPUInstrInfo::convertToISA(MachineInstr & MI, MachineFunction &MF,
DebugLoc DL) const
@@ -98,14 +53,3 @@ MachineInstr * AMDGPUInstrInfo::convertToISA(MachineInstr & MI, MachineFunction
return newInstr;
}
-
-unsigned AMDGPUInstrInfo::getISAOpcode(unsigned opcode) const
-{
- if (amdilToISA.count(opcode) == 0) {
- return opcode;
- } else {
- return amdilToISA.find(opcode)->second;
- }
-}
-
-#include "AMDGPUInstrEnums.include"