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authorTom Stellard <[email protected]>2012-05-18 16:58:31 -0400
committerTom Stellard <[email protected]>2012-05-20 16:27:31 -0400
commitcee23ab246f22210b3063cdc47bdb45b3d943526 (patch)
tree14fb8092a9e68a2fce8e65916d7345c23b0e2517 /src/gallium/drivers/radeon/AMDGPUISelLowering.h
parent239792fb221556fbc0da6c046541ea078b6944db (diff)
radeon/llvm: Handle selectcc DAG node
R600 can now select instructions from the selectcc DAG node, which is typically lowered to one of the SET* instructions.
Diffstat (limited to 'src/gallium/drivers/radeon/AMDGPUISelLowering.h')
-rw-r--r--src/gallium/drivers/radeon/AMDGPUISelLowering.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUISelLowering.h b/src/gallium/drivers/radeon/AMDGPUISelLowering.h
index 849c0c734bb..d37473974bb 100644
--- a/src/gallium/drivers/radeon/AMDGPUISelLowering.h
+++ b/src/gallium/drivers/radeon/AMDGPUISelLowering.h
@@ -23,6 +23,7 @@ class AMDGPUTargetLowering : public AMDILTargetLowering
{
private:
SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
+ SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
protected:
@@ -36,6 +37,9 @@ protected:
MachineRegisterInfo & MRI, const TargetInstrInfo * TII,
unsigned reg) const;
+ bool isOne(SDValue Op) const;
+ bool isZero(SDValue Op) const;
+
public:
AMDGPUTargetLowering(TargetMachine &TM);