diff options
author | Tom Stellard <[email protected]> | 2012-05-17 07:35:15 -0400 |
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committer | Tom Stellard <[email protected]> | 2012-05-17 14:48:09 -0400 |
commit | 431bb79a41bd5e7402954385daea1594c3e750ab (patch) | |
tree | e48876a246422920a8fae0fb1a8c990f83b378be /src/gallium/drivers/radeon/AMDGPUISelLowering.h | |
parent | 602913192db1beadd9cc4252ec9ec633cfe7a21b (diff) |
radeon/llvm: Add custom SDNodes for MAX
We now lower the various intrinsics for max to SDNodes and then use
tablegen patterns to lower the SDNodes to instructions.
Diffstat (limited to 'src/gallium/drivers/radeon/AMDGPUISelLowering.h')
-rw-r--r-- | src/gallium/drivers/radeon/AMDGPUISelLowering.h | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUISelLowering.h b/src/gallium/drivers/radeon/AMDGPUISelLowering.h index 16adf1b32bb..b67f30bc976 100644 --- a/src/gallium/drivers/radeon/AMDGPUISelLowering.h +++ b/src/gallium/drivers/radeon/AMDGPUISelLowering.h @@ -21,6 +21,9 @@ namespace llvm { class AMDGPUTargetLowering : public AMDILTargetLowering { +private: + SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const; + protected: /// addLiveIn - This functions adds reg to the live in list of the entry block @@ -36,8 +39,26 @@ protected: public: AMDGPUTargetLowering(TargetMachine &TM); + virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; + virtual const char* getTargetNodeName(unsigned Opcode) const; + }; +namespace AMDGPUISD +{ + +enum +{ + AMDGPU_FIRST = AMDILISD::LAST_NON_MEMORY_OPCODE, + FMAX, + SMAX, + UMAX, + LAST_AMDGPU_ISD_NUMBER +}; + + +} // End namespace AMDGPUISD + } // End namespace llvm #endif // AMDGPUISELLOWERING_H |