summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/radeon/AMDGPU.h
diff options
context:
space:
mode:
authorTom Stellard <[email protected]>2012-05-07 14:52:11 -0400
committerTom Stellard <[email protected]>2012-05-08 15:47:46 -0400
commitf903da7335433ae243cf7ff59662be1a03ee9a14 (patch)
treeddf442fc0e8e36e8f4ae9fe53580bb7d52718194 /src/gallium/drivers/radeon/AMDGPU.h
parenta8d82c44f79e27d2b78458f9ea560c73eef3d3b5 (diff)
radeon/llvm: Add some comments and fix coding style
Diffstat (limited to 'src/gallium/drivers/radeon/AMDGPU.h')
-rw-r--r--src/gallium/drivers/radeon/AMDGPU.h37
1 files changed, 16 insertions, 21 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPU.h b/src/gallium/drivers/radeon/AMDGPU.h
index 7aeb3a8e625..ab26dc98f93 100644
--- a/src/gallium/drivers/radeon/AMDGPU.h
+++ b/src/gallium/drivers/radeon/AMDGPU.h
@@ -1,4 +1,4 @@
-//===-- AMDGPU.h - TODO: Add brief description -------===//
+//===-- AMDGPU.h - MachineFunction passes hw codegen --------------*- C++ -*-=//
//
// The LLVM Compiler Infrastructure
//
@@ -6,10 +6,6 @@
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
-//
-// TODO: Add full description
-//
-//===----------------------------------------------------------------------===//
#ifndef AMDGPU_H
#define AMDGPU_H
@@ -19,25 +15,24 @@
#include "llvm/Target/TargetMachine.h"
namespace llvm {
- class FunctionPass;
- class AMDGPUTargetMachine;
-
- FunctionPass *createR600CodeEmitterPass(formatted_raw_ostream &OS);
- FunctionPass *createR600LowerInstructionsPass(TargetMachine &tm);
- FunctionPass *createSIAssignInterpRegsPass(TargetMachine &tm);
- FunctionPass *createSIInitMachineFunctionInfoPass(TargetMachine &tm);
- FunctionPass *createSILowerShaderInstructionsPass(TargetMachine &tm);
- FunctionPass *createSIPropagateImmReadsPass(TargetMachine &tm);
- FunctionPass *createSICodeEmitterPass(formatted_raw_ostream &OS);
+class FunctionPass;
+class AMDGPUTargetMachine;
- FunctionPass *createAMDGPULowerInstructionsPass(TargetMachine &tm);
+// R600 Passes
+FunctionPass *createR600CodeEmitterPass(formatted_raw_ostream &OS);
+FunctionPass *createR600LowerInstructionsPass(TargetMachine &tm);
- FunctionPass *createAMDGPUDelimitInstGroupsPass(TargetMachine &tm);
+// SI Passes
+FunctionPass *createSIAssignInterpRegsPass(TargetMachine &tm);
+FunctionPass *createSILowerShaderInstructionsPass(TargetMachine &tm);
+FunctionPass *createSIPropagateImmReadsPass(TargetMachine &tm);
+FunctionPass *createSICodeEmitterPass(formatted_raw_ostream &OS);
- FunctionPass *createAMDGPUConvertToISAPass(TargetMachine &tm);
+// Passes common to R600 and SI
+FunctionPass *createAMDGPULowerInstructionsPass(TargetMachine &tm);
+FunctionPass *createAMDGPUConvertToISAPass(TargetMachine &tm);
- FunctionPass *createAMDGPUFixRegClassesPass(TargetMachine &tm);
+} // End namespace llvm
-} /* End namespace llvm */
-#endif /* AMDGPU_H */
+#endif // AMDGPU_H