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authorTom Stellard <[email protected]>2012-04-19 10:14:41 -0400
committerTom Stellard <[email protected]>2012-04-23 09:34:05 -0400
commitf5fc3ac284eb8312e8076a5a9d47a5c082ebb537 (patch)
treec5ff2f94adfe77a5344cee421b5a1e60783548f0 /src/gallium/drivers/radeon/AMDGPU.h
parent519789d7e6f32efa0e01a9fbc7374bc494d76769 (diff)
radeon/llvm: Lower VCREATE_v4f32 for R600 and SI
Diffstat (limited to 'src/gallium/drivers/radeon/AMDGPU.h')
-rw-r--r--src/gallium/drivers/radeon/AMDGPU.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPU.h b/src/gallium/drivers/radeon/AMDGPU.h
index 5613dab4b35..eff002a5eae 100644
--- a/src/gallium/drivers/radeon/AMDGPU.h
+++ b/src/gallium/drivers/radeon/AMDGPU.h
@@ -27,7 +27,6 @@ namespace llvm {
FunctionPass *createR600LowerInstructionsPass(TargetMachine &tm);
FunctionPass *createSIAssignInterpRegsPass(TargetMachine &tm);
- FunctionPass *createSIConvertToISAPass(TargetMachine &tm);
FunctionPass *createSIInitMachineFunctionInfoPass(TargetMachine &tm);
FunctionPass *createSILowerShaderInstructionsPass(TargetMachine &tm);
FunctionPass *createSIPropagateImmReadsPass(TargetMachine &tm);
@@ -35,6 +34,7 @@ namespace llvm {
FunctionPass *createAMDGPUReorderPreloadInstructionsPass(TargetMachine &tm);
+ FunctionPass *createAMDGPULowerInstructionsPass(TargetMachine &tm);
FunctionPass *createAMDGPULowerShaderInstructionsPass(TargetMachine &tm);
FunctionPass *createAMDGPUDelimitInstGroupsPass(TargetMachine &tm);