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authorDave Airlie <[email protected]>2010-08-26 14:55:48 +1000
committerJerome Glisse <[email protected]>2010-08-30 15:00:55 -0400
commit69c30f5d6d429be4f7e211867984dab1a33da79c (patch)
treede0c6838b1977f7e273e8a6912c36812c43ec839 /src/gallium/drivers/r600
parent699c82e30ce78c3975b3ce1a6fba148c70a9a78a (diff)
r600g: fixup states generation in winsys.
The current states code had an unhealthy relationship between that had to somehow magically align themselves, editing either place meant renumbering all states after the one you were on, and it was pretty unapproachable code. This replaces the huge types structures with a simple type + sub type struct, which is keyed on an stype enum in radeon.h. Each stype can have a per-shader type subclassing (4 types supported, PS/VS/GS/FS), and also has a number of states per-subtype. So you have 256 constants per 4 shaders per one CONSTANT stype. The interface from the driver is changed to pass in the tuple, (stype, id, shader_type), and we look for this. If radeon_state_shader ever shows up on profile, it could use a hashtable based on stype/shader_type to speed things up. Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600')
-rw-r--r--src/gallium/drivers/r600/r600_blit.c23
-rw-r--r--src/gallium/drivers/r600/r600_context.c2
-rw-r--r--src/gallium/drivers/r600/r600_draw.c11
-rw-r--r--src/gallium/drivers/r600/r600_query.c4
-rw-r--r--src/gallium/drivers/r600/r600_shader.c4
-rw-r--r--src/gallium/drivers/r600/r600_state.c38
-rw-r--r--src/gallium/drivers/r600/r600_texture.c8
-rw-r--r--src/gallium/drivers/r600/radeon.h112
8 files changed, 85 insertions, 117 deletions
diff --git a/src/gallium/drivers/r600/r600_blit.c b/src/gallium/drivers/r600/r600_blit.c
index 72175fbbd5e..6b8487695c9 100644
--- a/src/gallium/drivers/r600/r600_blit.c
+++ b/src/gallium/drivers/r600/r600_blit.c
@@ -190,7 +190,7 @@ static int r600_blit_state_vs_resources(struct r600_screen *rscreen, struct r600
memcpy(bo->data, vbo, 128);
radeon_bo_unmap(rscreen->rw, bo);
- rstate = radeon_state(rscreen->rw, R600_VS_RESOURCE_TYPE, R600_VS_RESOURCE + 0);
+ rstate = radeon_state_shader(rscreen->rw, R600_STATE_RESOURCE, 0, R600_SHADER_VS);
if (rstate == NULL) {
radeon_bo_decref(rscreen->rw, bo);
return -ENOMEM;
@@ -215,7 +215,7 @@ static int r600_blit_state_vs_resources(struct r600_screen *rscreen, struct r600
}
bstates->vs_resource0 = rstate;
- rstate = radeon_state(rscreen->rw, R600_VS_RESOURCE_TYPE, R600_VS_RESOURCE + 1);
+ rstate = radeon_state_shader(rscreen->rw, R600_STATE_RESOURCE, 0, R600_SHADER_VS);
if (rstate == NULL) {
return -ENOMEM;
}
@@ -303,7 +303,7 @@ static struct radeon_state *r600_blit_state_vs_shader(struct r600_screen *rscree
}
radeon_bo_unmap(rscreen->rw, bo);
- rstate = radeon_state(rscreen->rw, R600_VS_SHADER_TYPE, R600_VS_SHADER);
+ rstate = radeon_state_shader(rscreen->rw, R600_STATE_SHADER, 0, R600_SHADER_VS);
if (rstate == NULL) {
radeon_bo_decref(rscreen->rw, bo);
return NULL;
@@ -374,7 +374,7 @@ static struct radeon_state *r600_blit_state_ps_shader(struct r600_screen *rscree
}
radeon_bo_unmap(rscreen->rw, bo);
- rstate = radeon_state(rscreen->rw, R600_PS_SHADER_TYPE, R600_PS_SHADER);
+ rstate = radeon_state_shader(rscreen->rw, R600_STATE_SHADER, 0, R600_SHADER_PS);
if (rstate == NULL) {
radeon_bo_decref(rscreen->rw, bo);
return NULL;
@@ -403,8 +403,7 @@ static struct radeon_state *r600_blit_state_vgt(struct r600_screen *rscreen)
{
struct radeon_state *rstate;
- rstate = radeon_state(rscreen->rw, R600_VGT_TYPE, R600_VGT);
- if (rstate == NULL)
+ rstate = radeon_state(rscreen->rw, R600_STATE_VGT, 0); if (rstate == NULL)
return NULL;
/* set states (most default value are 0 and struct already
@@ -425,7 +424,7 @@ static struct radeon_state *r600_blit_state_draw(struct r600_screen *rscreen)
{
struct radeon_state *rstate;
- rstate = radeon_state(rscreen->rw, R600_DRAW_TYPE, R600_DRAW);
+ rstate = radeon_state(rscreen->rw, R600_STATE_DRAW, 0);
if (rstate == NULL)
return NULL;
@@ -448,7 +447,7 @@ static struct radeon_state *r600_blit_state_vs_constant(struct r600_screen *rscr
{
struct radeon_state *rstate;
- rstate = radeon_state(rscreen->rw, R600_VS_CONSTANT_TYPE, R600_VS_CONSTANT + id);
+ rstate = radeon_state_shader(rscreen->rw, R600_STATE_CONSTANT, id, R600_SHADER_VS);
if (rstate == NULL)
return NULL;
@@ -471,7 +470,7 @@ static struct radeon_state *r600_blit_state_rasterizer(struct r600_screen *rscre
{
struct radeon_state *rstate;
- rstate = radeon_state(rscreen->rw, R600_RASTERIZER_TYPE, R600_RASTERIZER);
+ rstate = radeon_state(rscreen->rw, R600_STATE_RASTERIZER, 0);
if (rstate == NULL)
return NULL;
@@ -500,7 +499,7 @@ static struct radeon_state *r600_blit_state_dsa(struct r600_screen *rscreen)
{
struct radeon_state *rstate;
- rstate = radeon_state(rscreen->rw, R600_DSA_TYPE, R600_DSA);
+ rstate = radeon_state(rscreen->rw, R600_STATE_DSA, 0);
if (rstate == NULL)
return NULL;
@@ -524,7 +523,7 @@ static struct radeon_state *r600_blit_state_blend(struct r600_screen *rscreen)
{
struct radeon_state *rstate;
- rstate = radeon_state(rscreen->rw, R600_BLEND_TYPE, R600_BLEND);
+ rstate = radeon_state(rscreen->rw, R600_STATE_BLEND, 0);
if (rstate == NULL)
return NULL;
@@ -543,7 +542,7 @@ static struct radeon_state *r600_blit_state_cb_cntl(struct r600_screen *rscreen)
{
struct radeon_state *rstate;
- rstate = radeon_state(rscreen->rw, R600_CB_CNTL_TYPE, R600_CB_CNTL);
+ rstate = radeon_state(rscreen->rw, R600_STATE_CB_CNTL, 0);
if (rstate == NULL)
return NULL;
diff --git a/src/gallium/drivers/r600/r600_context.c b/src/gallium/drivers/r600/r600_context.c
index 9af28356c5c..db170122ddb 100644
--- a/src/gallium/drivers/r600/r600_context.c
+++ b/src/gallium/drivers/r600/r600_context.c
@@ -218,7 +218,7 @@ static void r600_init_config(struct r600_context *rctx)
num_es_stack_entries = 0;
break;
}
- rctx->hw_states.config = radeon_state(rctx->rw, R600_CONFIG_TYPE, R600_CONFIG);
+ rctx->hw_states.config = radeon_state(rctx->rw, R600_STATE_CONFIG, 0);
rctx->hw_states.config->states[R600_CONFIG__SQ_CONFIG] = 0x00000000;
switch (family) {
diff --git a/src/gallium/drivers/r600/r600_draw.c b/src/gallium/drivers/r600/r600_draw.c
index 1c426f755da..88f93bca7bf 100644
--- a/src/gallium/drivers/r600/r600_draw.c
+++ b/src/gallium/drivers/r600/r600_draw.c
@@ -101,7 +101,7 @@ static int r600_draw_common(struct r600_draw *draw)
rbuffer = (struct r600_resource*)vertex_buffer->buffer;
offset = rctx->vertex_elements->elements[i].src_offset + vertex_buffer->buffer_offset;
format = r600_translate_colorformat(rctx->vertex_elements->elements[i].src_format);
- vs_resource = radeon_state(rscreen->rw, R600_VS_RESOURCE_TYPE, R600_VS_RESOURCE + i);
+ vs_resource = radeon_state_shader(rscreen->rw, R600_STATE_RESOURCE, i, R600_SHADER_VS);
if (vs_resource == NULL)
return -ENOMEM;
vs_resource->bo[0] = radeon_bo_incref(rscreen->rw, rbuffer->bo);
@@ -121,7 +121,7 @@ static int r600_draw_common(struct r600_draw *draw)
return r;
}
/* FIXME start need to change winsys */
- draw->draw = radeon_state(rscreen->rw, R600_DRAW_TYPE, R600_DRAW);
+ draw->draw = radeon_state(rscreen->rw, R600_STATE_DRAW, 0);
if (draw->draw == NULL)
return -ENOMEM;
draw->draw->states[R600_DRAW__VGT_NUM_INDICES] = draw->count;
@@ -136,7 +136,7 @@ static int r600_draw_common(struct r600_draw *draw)
r = radeon_draw_set_new(rctx->draw, draw->draw);
if (r)
return r;
- draw->vgt = radeon_state(rscreen->rw, R600_VGT_TYPE, R600_VGT);
+ draw->vgt = radeon_state(rscreen->rw, R600_STATE_VGT, 0);
if (draw->vgt == NULL)
return -ENOMEM;
draw->vgt->states[R600_VGT__VGT_PRIMITIVE_TYPE] = prim;
@@ -169,6 +169,7 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
{
struct r600_context *rctx = r600_context(ctx);
struct r600_draw draw;
+ int r;
assert(info->index_bias == 0);
@@ -189,5 +190,7 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
draw.index_size = 0;
draw.index_buffer = NULL;
}
- r600_draw_common(&draw);
+ r = r600_draw_common(&draw);
+ if (r)
+ fprintf(stderr,"draw common failed %d\n", r);
}
diff --git a/src/gallium/drivers/r600/r600_query.c b/src/gallium/drivers/r600/r600_query.c
index 5929606cd28..af857101e3c 100644
--- a/src/gallium/drivers/r600/r600_query.c
+++ b/src/gallium/drivers/r600/r600_query.c
@@ -36,7 +36,7 @@ static struct radeon_state *r600_query_begin(struct r600_context *rctx, struct r
struct r600_screen *rscreen = rctx->screen;
struct radeon_state *rstate;
- rstate = radeon_state(rscreen->rw, R600_QUERY_BEGIN_TYPE, R600_QUERY_BEGIN);
+ rstate = radeon_state(rscreen->rw, R600_STATE_QUERY_BEGIN, 0);
if (rstate == NULL)
return NULL;
rstate->states[R600_QUERY__OFFSET] = rquery->num_results;
@@ -55,7 +55,7 @@ static struct radeon_state *r600_query_end(struct r600_context *rctx, struct r60
struct r600_screen *rscreen = rctx->screen;
struct radeon_state *rstate;
- rstate = radeon_state(rscreen->rw, R600_QUERY_END_TYPE, R600_QUERY_END);
+ rstate = radeon_state(rscreen->rw, R600_STATE_QUERY_END, 0);
if (rstate == NULL)
return NULL;
rstate->states[R600_QUERY__OFFSET] = rquery->num_results + 8;
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 23b3eabf526..652d4035cc8 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -134,7 +134,7 @@ static int r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_context_sta
unsigned i, tmp;
rpshader->rstate = radeon_state_decref(rpshader->rstate);
- state = radeon_state(rscreen->rw, R600_VS_SHADER_TYPE, R600_VS_SHADER);
+ state = radeon_state_shader(rscreen->rw, R600_STATE_SHADER, 0, R600_SHADER_VS);
if (state == NULL)
return -ENOMEM;
for (i = 0; i < 10; i++) {
@@ -168,7 +168,7 @@ static int r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_context_sta
rasterizer = &rctx->rasterizer->state.rasterizer;
rpshader->rstate = radeon_state_decref(rpshader->rstate);
- state = radeon_state(rscreen->rw, R600_PS_SHADER_TYPE, R600_PS_SHADER);
+ state = radeon_state_shader(rscreen->rw, R600_STATE_SHADER, 0, R600_SHADER_PS);
if (state == NULL)
return -ENOMEM;
for (i = 0; i < rshader->ninput; i++) {
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 441be8fd6df..b5db848e35e 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -283,19 +283,19 @@ static void r600_set_constant_buffer(struct pipe_context *ctx,
{
struct r600_screen *rscreen = r600_screen(ctx->screen);
struct r600_context *rctx = r600_context(ctx);
- unsigned nconstant = 0, i, type, id;
+ unsigned nconstant = 0, i, type, shader_class;
struct radeon_state *rstate;
struct pipe_transfer *transfer;
u32 *ptr;
+ type = R600_STATE_CONSTANT;
+
switch (shader) {
case PIPE_SHADER_VERTEX:
- id = R600_VS_CONSTANT;
- type = R600_VS_CONSTANT_TYPE;
+ shader_class = R600_SHADER_VS;
break;
case PIPE_SHADER_FRAGMENT:
- id = R600_PS_CONSTANT;
- type = R600_PS_CONSTANT_TYPE;
+ shader_class = R600_SHADER_PS;
break;
default:
R600_ERR("unsupported %d\n", shader);
@@ -307,7 +307,7 @@ static void r600_set_constant_buffer(struct pipe_context *ctx,
if (ptr == NULL)
return;
for (i = 0; i < nconstant; i++) {
- rstate = radeon_state(rscreen->rw, type, id + i);
+ rstate = radeon_state_shader(rscreen->rw, type, i, shader_class);
if (rstate == NULL)
return;
rstate->states[R600_PS_CONSTANT__SQ_ALU_CONSTANT0_0] = ptr[i * 4 + 0];
@@ -622,7 +622,7 @@ static struct radeon_state *r600_blend(struct r600_context *rctx)
const struct pipe_blend_state *state = &rctx->blend->state.blend;
int i;
- rstate = radeon_state(rscreen->rw, R600_BLEND_TYPE, R600_BLEND);
+ rstate = radeon_state(rscreen->rw, R600_STATE_BLEND, 0);
if (rstate == NULL)
return NULL;
rstate->states[R600_BLEND__CB_BLEND_RED] = fui(rctx->blend_color.color[0]);
@@ -681,7 +681,7 @@ static struct radeon_state *r600_ucp(struct r600_context *rctx, int clip)
struct radeon_state *rstate;
const struct pipe_clip_state *state = &rctx->clip->state.clip;
- rstate = radeon_state(rscreen->rw, R600_CLIP_TYPE, R600_CLIP + clip);
+ rstate = radeon_state(rscreen->rw, R600_STATE_CLIP, clip);
if (rstate == NULL)
return NULL;
@@ -711,7 +711,7 @@ static struct radeon_state *r600_cb(struct r600_context *rctx, int cb)
unsigned format, swap, ntype;
const struct util_format_description *desc;
- rstate = radeon_state(rscreen->rw, R600_CB0_TYPE + cb, R600_CB0 + cb);
+ rstate = radeon_state(rscreen->rw, R600_STATE_CB0 + cb, 0);
if (rstate == NULL)
return NULL;
rtex = (struct r600_resource_texture*)state->cbufs[cb]->texture;
@@ -768,7 +768,7 @@ static struct radeon_state *r600_db(struct r600_context *rctx)
if (state->zsbuf == NULL)
return NULL;
- rstate = radeon_state(rscreen->rw, R600_DB_TYPE, R600_DB);
+ rstate = radeon_state(rscreen->rw, R600_STATE_DB, 0);
if (rstate == NULL)
return NULL;
@@ -844,7 +844,7 @@ static struct radeon_state *r600_rasterizer(struct r600_context *rctx)
prov_vtx = 0;
rctx->flat_shade = state->flatshade;
- rstate = radeon_state(rscreen->rw, R600_RASTERIZER_TYPE, R600_RASTERIZER);
+ rstate = radeon_state(rscreen->rw, R600_STATE_RASTERIZER, 0);
if (rstate == NULL)
return NULL;
rstate->states[R600_RASTERIZER__SPI_INTERP_CONTROL_0] = 0x00000001;
@@ -925,7 +925,7 @@ static struct radeon_state *r600_scissor(struct r600_context *rctx)
}
tl = S_028240_TL_X(minx) | S_028240_TL_Y(miny) | S_028240_WINDOW_OFFSET_DISABLE(1);
br = S_028244_BR_X(maxx) | S_028244_BR_Y(maxy);
- rstate = radeon_state(rscreen->rw, R600_SCISSOR_TYPE, R600_SCISSOR);
+ rstate = radeon_state(rscreen->rw, R600_STATE_SCISSOR, 0);
if (rstate == NULL)
return NULL;
rstate->states[R600_SCISSOR__PA_SC_SCREEN_SCISSOR_TL] = tl;
@@ -960,7 +960,7 @@ static struct radeon_state *r600_viewport(struct r600_context *rctx)
struct r600_screen *rscreen = rctx->screen;
struct radeon_state *rstate;
- rstate = radeon_state(rscreen->rw, R600_VIEWPORT_TYPE, R600_VIEWPORT);
+ rstate = radeon_state(rscreen->rw, R600_STATE_VIEWPORT, 0);
if (rstate == NULL)
return NULL;
rstate->states[R600_VIEWPORT__PA_SC_VPORT_ZMIN_0] = 0x00000000;
@@ -993,7 +993,7 @@ static struct radeon_state *r600_dsa(struct r600_context *rctx)
if (rctx->ps_shader == NULL) {
return NULL;
}
- rstate = radeon_state(rscreen->rw, R600_DSA_TYPE, R600_DSA);
+ rstate = radeon_state(rscreen->rw, R600_STATE_DSA, 0);
if (rstate == NULL)
return NULL;
@@ -1147,7 +1147,7 @@ static struct radeon_state *r600_sampler(struct r600_context *rctx,
struct r600_screen *rscreen = rctx->screen;
struct radeon_state *rstate;
- rstate = radeon_state(rscreen->rw, R600_PS_SAMPLER_TYPE, id);
+ rstate = radeon_state_shader(rscreen->rw, R600_STATE_SAMPLER, id, R600_SHADER_PS);
if (rstate == NULL)
return NULL;
rstate->states[R600_PS_SAMPLER__SQ_TEX_SAMPLER_WORD0_0] =
@@ -1248,7 +1248,7 @@ static struct radeon_state *r600_resource(struct pipe_context *ctx,
R600_ERR("unknow format %d\n", view->texture->format);
return NULL;
}
- rstate = radeon_state(rscreen->rw, R600_PS_RESOURCE_TYPE, id);
+ rstate = radeon_state_shader(rscreen->rw, R600_STATE_RESOURCE, id, R600_SHADER_PS);
if (rstate == NULL) {
return NULL;
}
@@ -1344,7 +1344,7 @@ static struct radeon_state *r600_cb_cntl(struct r600_context *rctx)
target_mask |= (pbs->rt[0].colormask << (4 * i));
}
}
- rstate = radeon_state(rscreen->rw, R600_CB_CNTL_TYPE, R600_CB_CNTL);
+ rstate = radeon_state(rscreen->rw, R600_STATE_CB_CNTL, 0);
rstate->states[R600_CB_CNTL__CB_SHADER_MASK] = shader_mask;
rstate->states[R600_CB_CNTL__CB_TARGET_MASK] = target_mask;
rstate->states[R600_CB_CNTL__CB_COLOR_CONTROL] = color_control;
@@ -1421,7 +1421,7 @@ int r600_context_hw_states(struct pipe_context *ctx)
if (rctx->ps_sampler[i]) {
rctx->hw_states.ps_sampler[i] = r600_sampler(rctx,
&rctx->ps_sampler[i]->state.sampler,
- R600_PS_SAMPLER + i);
+ i);
}
}
rctx->hw_states.ps_nsampler = rctx->ps_nsampler;
@@ -1429,7 +1429,7 @@ int r600_context_hw_states(struct pipe_context *ctx)
if (rctx->ps_sampler_view[i]) {
rctx->hw_states.ps_resource[i] = r600_resource(ctx,
&rctx->ps_sampler_view[i]->state.sampler_view,
- R600_PS_RESOURCE + i);
+ i);
}
}
rctx->hw_states.ps_nresource = rctx->ps_nsampler_view;
diff --git a/src/gallium/drivers/r600/r600_texture.c b/src/gallium/drivers/r600/r600_texture.c
index fb84ed9cfea..77d627cdc89 100644
--- a/src/gallium/drivers/r600/r600_texture.c
+++ b/src/gallium/drivers/r600/r600_texture.c
@@ -663,7 +663,7 @@ static struct radeon_state *r600_texture_state_scissor(struct r600_screen *rscre
{
struct radeon_state *rstate;
- rstate = radeon_state(rscreen->rw, R600_SCISSOR_TYPE, R600_SCISSOR);
+ rstate = radeon_state(rscreen->rw, R600_STATE_SCISSOR, 0);
if (rstate == NULL)
return NULL;
@@ -707,7 +707,7 @@ static struct radeon_state *r600_texture_state_cb0(struct r600_screen *rscreen,
unsigned format, swap, ntype;
const struct util_format_description *desc;
- rstate = radeon_state(rscreen->rw, R600_CB0_TYPE, R600_CB0);
+ rstate = radeon_state(rscreen->rw, R600_STATE_CB0, 0);
if (rstate == NULL)
return NULL;
rbuffer = &rtexture->resource;
@@ -766,7 +766,7 @@ static struct radeon_state *r600_texture_state_db(struct r600_screen *rscreen,
struct r600_resource *rbuffer;
unsigned pitch, slice, format;
- rstate = radeon_state(rscreen->rw, R600_DB_TYPE, R600_DB);
+ rstate = radeon_state(rscreen->rw, R600_STATE_DB, 0);
if (rstate == NULL)
return NULL;
rbuffer = &rtexture->resource;
@@ -815,7 +815,7 @@ static struct radeon_state *r600_texture_state_viewport(struct r600_screen *rscr
{
struct radeon_state *rstate;
- rstate = radeon_state(rscreen->rw, R600_VIEWPORT_TYPE, R600_VIEWPORT);
+ rstate = radeon_state(rscreen->rw, R600_STATE_VIEWPORT, 0);
if (rstate == NULL)
return NULL;
diff --git a/src/gallium/drivers/r600/radeon.h b/src/gallium/drivers/r600/radeon.h
index b2cc74f6967..046c264c044 100644
--- a/src/gallium/drivers/r600/radeon.h
+++ b/src/gallium/drivers/r600/radeon.h
@@ -98,14 +98,16 @@ struct radeon_bo *radeon_bo_incref(struct radeon *radeon, struct radeon_bo *bo);
struct radeon_bo *radeon_bo_decref(struct radeon *radeon, struct radeon_bo *bo);
int radeon_bo_wait(struct radeon *radeon, struct radeon_bo *bo);
+struct radeon_stype_info;
/*
* states functions
*/
struct radeon_state {
struct radeon *radeon;
unsigned refcount;
- unsigned type;
+ struct radeon_stype_info *stype;
unsigned id;
+ unsigned shader_index;
unsigned nstates;
u32 *states;
unsigned npm4;
@@ -124,6 +126,7 @@ struct radeon_state {
};
struct radeon_state *radeon_state(struct radeon *radeon, u32 type, u32 id);
+struct radeon_state *radeon_state_shader(struct radeon *radeon, u32 type, u32 id, u32 shader_class);
struct radeon_state *radeon_state_incref(struct radeon_state *state);
struct radeon_state *radeon_state_decref(struct radeon_state *state);
int radeon_state_pm4(struct radeon_state *state);
@@ -192,79 +195,42 @@ struct radeon_ctx {
* R600/R700
*/
-#define R600_NSTATE 1288
-#define R600_NTYPE 35
+enum r600_stype {
+ R600_STATE_CONFIG,
+ R600_STATE_CB_CNTL,
+ R600_STATE_RASTERIZER,
+ R600_STATE_VIEWPORT,
+ R600_STATE_SCISSOR,
+ R600_STATE_BLEND,
+ R600_STATE_DSA,
+ R600_STATE_SHADER, /* has PS,VS,GS,FS variants */
+ R600_STATE_CONSTANT, /* has PS,VS,GS,FS variants */
+ R600_STATE_RESOURCE, /* has PS,VS,GS,FS variants */
+ R600_STATE_SAMPLER, /* has PS,VS,GS,FS variants */
+ R600_STATE_SAMPLER_BORDER, /* has PS,VS,GS,FS variants */
+ R600_STATE_CB0,
+ R600_STATE_CB1,
+ R600_STATE_CB2,
+ R600_STATE_CB3,
+ R600_STATE_CB4,
+ R600_STATE_CB5,
+ R600_STATE_CB6,
+ R600_STATE_CB7,
+ R600_STATE_DB,
+ R600_STATE_QUERY_BEGIN,
+ R600_STATE_QUERY_END,
+ R600_STATE_CLIP,
+ R600_STATE_VGT,
+ R600_STATE_DRAW,
+};
-#define R600_CONFIG 0
-#define R600_CONFIG_TYPE 0
-#define R600_CB_CNTL 1
-#define R600_CB_CNTL_TYPE 1
-#define R600_RASTERIZER 2
-#define R600_RASTERIZER_TYPE 2
-#define R600_VIEWPORT 3
-#define R600_VIEWPORT_TYPE 3
-#define R600_SCISSOR 4
-#define R600_SCISSOR_TYPE 4
-#define R600_BLEND 5
-#define R600_BLEND_TYPE 5
-#define R600_DSA 6
-#define R600_DSA_TYPE 6
-#define R600_VS_SHADER 7
-#define R600_VS_SHADER_TYPE 7
-#define R600_PS_SHADER 8
-#define R600_PS_SHADER_TYPE 8
-#define R600_PS_CONSTANT 9
-#define R600_PS_CONSTANT_TYPE 9
-#define R600_VS_CONSTANT 265
-#define R600_VS_CONSTANT_TYPE 10
-#define R600_PS_RESOURCE 521
-#define R600_PS_RESOURCE_TYPE 11
-#define R600_VS_RESOURCE 681
-#define R600_VS_RESOURCE_TYPE 12
-#define R600_FS_RESOURCE 841
-#define R600_FS_RESOURCE_TYPE 13
-#define R600_GS_RESOURCE 1001
-#define R600_GS_RESOURCE_TYPE 14
-#define R600_PS_SAMPLER 1161
-#define R600_PS_SAMPLER_TYPE 15
-#define R600_VS_SAMPLER 1179
-#define R600_VS_SAMPLER_TYPE 16
-#define R600_GS_SAMPLER 1197
-#define R600_GS_SAMPLER_TYPE 17
-#define R600_PS_SAMPLER_BORDER 1215
-#define R600_PS_SAMPLER_BORDER_TYPE 18
-#define R600_VS_SAMPLER_BORDER 1233
-#define R600_VS_SAMPLER_BORDER_TYPE 19
-#define R600_GS_SAMPLER_BORDER 1251
-#define R600_GS_SAMPLER_BORDER_TYPE 20
-#define R600_CB0 1269
-#define R600_CB0_TYPE 21
-#define R600_CB1 1270
-#define R600_CB1_TYPE 22
-#define R600_CB2 1271
-#define R600_CB2_TYPE 23
-#define R600_CB3 1272
-#define R600_CB3_TYPE 24
-#define R600_CB4 1273
-#define R600_CB4_TYPE 25
-#define R600_CB5 1274
-#define R600_CB5_TYPE 26
-#define R600_CB6 1275
-#define R600_CB6_TYPE 27
-#define R600_CB7 1276
-#define R600_CB7_TYPE 28
-#define R600_QUERY_BEGIN 1277
-#define R600_QUERY_BEGIN_TYPE 29
-#define R600_QUERY_END 1278
-#define R600_QUERY_END_TYPE 30
-#define R600_DB 1279
-#define R600_DB_TYPE 31
-#define R600_CLIP 1280
-#define R600_CLIP_TYPE 32
-#define R600_VGT 1286
-#define R600_VGT_TYPE 33
-#define R600_DRAW 1287
-#define R600_DRAW_TYPE 34
+enum {
+ R600_SHADER_PS = 1,
+ R600_SHADER_VS,
+ R600_SHADER_GS,
+ R600_SHADER_FS,
+ R600_SHADER_MAX = R600_SHADER_FS,
+};
/* R600_CONFIG */
#define R600_CONFIG__SQ_CONFIG 0