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authorDave Airlie <[email protected]>2010-09-21 19:57:58 +1000
committerDave Airlie <[email protected]>2010-09-21 20:53:09 +1000
commit88934273776242878dbaabdae25a7027fdeaff05 (patch)
treed97fad1c466460c098f7d2c46eac535b18e2db61 /src/gallium/drivers/r600
parentb6ced8ee7b2c86e94fd7467d12aca5e322048ba4 (diff)
r600g: fix eg texture borders.
texture border regs are indexed on evergreen.
Diffstat (limited to 'src/gallium/drivers/r600')
-rw-r--r--src/gallium/drivers/r600/eg_hw_states.c1
-rw-r--r--src/gallium/drivers/r600/eg_states_inc.h33
2 files changed, 19 insertions, 15 deletions
diff --git a/src/gallium/drivers/r600/eg_hw_states.c b/src/gallium/drivers/r600/eg_hw_states.c
index 1d3a3e11c10..3d10095919a 100644
--- a/src/gallium/drivers/r600/eg_hw_states.c
+++ b/src/gallium/drivers/r600/eg_hw_states.c
@@ -471,6 +471,7 @@ static void eg_sampler_border(struct r600_context *rctx, struct radeon_state *rs
radeon_state_init(rstate, rscreen->rw, R600_STATE_SAMPLER_BORDER, id, R600_SHADER_PS);
if (uc.ui) {
+ rstate->states[EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_INDEX] = id;
rstate->states[EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_RED] = fui(state->border_color[0]);
rstate->states[EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_GREEN] = fui(state->border_color[1]);
rstate->states[EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_BLUE] = fui(state->border_color[2]);
diff --git a/src/gallium/drivers/r600/eg_states_inc.h b/src/gallium/drivers/r600/eg_states_inc.h
index 462f31cc798..9f8007c8e91 100644
--- a/src/gallium/drivers/r600/eg_states_inc.h
+++ b/src/gallium/drivers/r600/eg_states_inc.h
@@ -368,27 +368,30 @@
#define EG_GS_SAMPLER_PM4 128
/* EG_PS_SAMPLER_BORDER */
-#define EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_RED 0
-#define EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_GREEN 1
-#define EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_BLUE 2
-#define EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_ALPHA 3
-#define EG_PS_SAMPLER_BORDER_SIZE 4
+#define EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_INDEX 0
+#define EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_RED 1
+#define EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_GREEN 2
+#define EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_BLUE 3
+#define EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_ALPHA 4
+#define EG_PS_SAMPLER_BORDER_SIZE 5
#define EG_PS_SAMPLER_BORDER_PM4 128
/* EG_VS_SAMPLER_BORDER */
-#define EG_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_RED 0
-#define EG_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_GREEN 1
-#define EG_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_BLUE 2
-#define EG_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_ALPHA 3
-#define EG_VS_SAMPLER_BORDER_SIZE 4
+#define EG_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_INDEX 0
+#define EG_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_RED 1
+#define EG_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_GREEN 2
+#define EG_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_BLUE 3
+#define EG_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_ALPHA 4
+#define EG_VS_SAMPLER_BORDER_SIZE 5
#define EG_VS_SAMPLER_BORDER_PM4 128
/* EG_GS_SAMPLER_BORDER */
-#define EG_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_RED 0
-#define EG_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_GREEN 1
-#define EG_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_BLUE 2
-#define EG_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_ALPHA 3
-#define EG_GS_SAMPLER_BORDER_SIZE 4
+#define EG_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_INDEX 0
+#define EG_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_RED 1
+#define EG_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_GREEN 2
+#define EG_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_BLUE 3
+#define EG_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_ALPHA 4
+#define EG_GS_SAMPLER_BORDER_SIZE 5
#define EG_GS_SAMPLER_BORDER_PM4 128
/* EG_CB */