gallium/radeon: create and return a fence in the flush function

All flush functions get a fence parameter. cs_create_fence is removed.

Reviewed-by: Christian König <[email protected]>

5 files changed, 20 insertions, 18 deletions

diff --git a/src/gallium/drivers/r600/evergreen_compute.c b/src/gallium/drivers/r600/evergreen_compute.c
index aba34085dae..701bb5cfa70 100644
--- a/src/gallium/drivers/r600/evergreen_compute.c
+++ b/src/gallium/drivers/r600/evergreen_compute.c
@@ -408,8 +408,8 @@ static void compute_emit_cs(struct r600_context *ctx, const uint *block_layout,
 	int i;
 
 	/* make sure that the gfx ring is only one active */
-	if (ctx->b.rings.dma.cs) {
-		ctx->b.rings.dma.flush(ctx, RADEON_FLUSH_ASYNC);
+	if (ctx->b.rings.dma.cs && ctx->b.rings.dma.cs->cdw) {
+		ctx->b.rings.dma.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
 	}
 
 	/* Initialize all the compute-related registers.
diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
index 1884412cb29..60260eea0c5 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -37,7 +37,7 @@ void r600_need_cs_space(struct r600_context *ctx, unsigned num_dw,
 	if (!ctx->b.ws->cs_memory_below_limit(ctx->b.rings.gfx.cs, ctx->b.vram, ctx->b.gtt)) {
 		ctx->b.gtt = 0;
 		ctx->b.vram = 0;
-		ctx->b.rings.gfx.flush(ctx, RADEON_FLUSH_ASYNC);
+		ctx->b.rings.gfx.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
 		return;
 	}
 	/* all will be accounted once relocation are emited */
@@ -93,7 +93,7 @@ void r600_need_cs_space(struct r600_context *ctx, unsigned num_dw,
 
 	/* Flush if there's not enough space. */
 	if (num_dw > RADEON_MAX_CMDBUF_DWORDS) {
-		ctx->b.rings.gfx.flush(ctx, RADEON_FLUSH_ASYNC);
+		ctx->b.rings.gfx.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
 	}
 }
 
@@ -230,7 +230,8 @@ void r600_flush_emit(struct r600_context *rctx)
 	rctx->b.flags = 0;
 }
 
-void r600_context_flush(struct r600_context *ctx, unsigned flags)
+void r600_context_flush(struct r600_context *ctx, unsigned flags,
+			struct pipe_fence_handle **fence)
 {
 	struct radeon_winsys_cs *cs = ctx->b.rings.gfx.cs;
 
@@ -270,7 +271,7 @@ void r600_context_flush(struct r600_context *ctx, unsigned flags)
 	}
 
 	/* Flush the CS. */
-	ctx->b.ws->cs_flush(ctx->b.rings.gfx.cs, flags, ctx->screen->b.cs_count++);
+	ctx->b.ws->cs_flush(cs, flags, fence, ctx->screen->b.cs_count++);
 }
 
 void r600_begin_new_cs(struct r600_context *ctx)
diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index 677f414226d..ef8883d18a7 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -66,7 +66,8 @@ static const struct debug_named_value r600_debug_options[] = {
  * pipe_context
  */
 
-static void r600_flush(struct pipe_context *ctx, unsigned flags)
+static void r600_flush(struct pipe_context *ctx, unsigned flags,
+		       struct pipe_fence_handle **fence)
 {
 	struct r600_context *rctx = (struct r600_context *)ctx;
 	struct pipe_query *render_cond = NULL;
@@ -85,7 +86,7 @@ static void r600_flush(struct pipe_context *ctx, unsigned flags)
 		ctx->render_condition(ctx, NULL, FALSE, 0);
 	}
 
-	r600_context_flush(rctx, flags);
+	r600_context_flush(rctx, flags, fence);
 	rctx->b.rings.gfx.flushing = false;
 	r600_begin_new_cs(rctx);
 
@@ -105,19 +106,18 @@ static void r600_flush_from_st(struct pipe_context *ctx,
 	unsigned fflags;
 
 	fflags = flags & PIPE_FLUSH_END_OF_FRAME ? RADEON_FLUSH_END_OF_FRAME : 0;
-	if (fence) {
-		*fence = rctx->b.ws->cs_create_fence(rctx->b.rings.gfx.cs);
-	}
+
 	/* flush gfx & dma ring, order does not matter as only one can be live */
 	if (rctx->b.rings.dma.cs) {
-		rctx->b.rings.dma.flush(rctx, fflags);
+		rctx->b.rings.dma.flush(rctx, fflags, NULL);
 	}
-	rctx->b.rings.gfx.flush(rctx, fflags);
+	rctx->b.rings.gfx.flush(rctx, fflags, fence);
 }
 
-static void r600_flush_gfx_ring(void *ctx, unsigned flags)
+static void r600_flush_gfx_ring(void *ctx, unsigned flags,
+				struct pipe_fence_handle **fence)
 {
-	r600_flush((struct pipe_context*)ctx, flags);
+	r600_flush((struct pipe_context*)ctx, flags, fence);
 }
 
 static void r600_destroy_context(struct pipe_context *context)
diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index 0a3fa42c27c..d52de352063 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -582,7 +582,8 @@ boolean r600_is_format_supported(struct pipe_screen *screen,
 void r600_update_db_shader_control(struct r600_context * rctx);
 
 /* r600_hw_context.c */
-void r600_context_flush(struct r600_context *ctx, unsigned flags);
+void r600_context_flush(struct r600_context *ctx, unsigned flags,
+			struct pipe_fence_handle **fence);
 void r600_begin_new_cs(struct r600_context *ctx);
 void r600_flush_emit(struct r600_context *ctx);
 void r600_need_cs_space(struct r600_context *ctx, unsigned num_dw, boolean count_draw_in);
diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index 7dbb0b777ed..4245b145a93 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -1335,8 +1335,8 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
 	}
 
 	/* make sure that the gfx ring is only one active */
-	if (rctx->b.rings.dma.cs) {
-		rctx->b.rings.dma.flush(rctx, RADEON_FLUSH_ASYNC);
+	if (rctx->b.rings.dma.cs && rctx->b.rings.dma.cs->cdw) {
+		rctx->b.rings.dma.flush(rctx, RADEON_FLUSH_ASYNC, NULL);
 	}
 
 	if (!r600_update_derived_state(rctx)) {