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authorMarek Olšák <[email protected]>2018-07-12 00:17:02 -0400
committerMarek Olšák <[email protected]>2018-07-16 13:32:33 -0400
commit54ad9b444c8e73da498211870e785239ad3ff1aa (patch)
tree542fb17d7bcdd1f9838513f2de883676b579f8bd /src/gallium/drivers/r600
parent3e6888e5d7caaa6b588c94a89010478fad286d99 (diff)
radeonsi: merge DCC/CMASK/HTILE priority flags
For a later simplification. Reviewed-by: Samuel Pitoiset <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600')
-rw-r--r--src/gallium/drivers/r600/evergreen_state.c4
-rw-r--r--src/gallium/drivers/r600/r600_state.c2
2 files changed, 3 insertions, 3 deletions
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 76a3e0e441a..57b82e7855f 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -1864,7 +1864,7 @@ static void evergreen_emit_framebuffer_state(struct r600_context *rctx, struct r
if (tex->cmask_buffer && tex->cmask_buffer != &tex->resource) {
cmask_reloc = radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx,
tex->cmask_buffer, RADEON_USAGE_READWRITE,
- RADEON_PRIO_CMASK);
+ RADEON_PRIO_SEPARATE_META);
} else {
cmask_reloc = reloc;
}
@@ -2053,7 +2053,7 @@ static void evergreen_emit_db_state(struct r600_context *rctx, struct r600_atom
radeon_set_context_reg(cs, R_028AC8_DB_PRELOAD_CONTROL, a->rsurf->db_preload_control);
radeon_set_context_reg(cs, R_028014_DB_HTILE_DATA_BASE, a->rsurf->db_htile_data_base);
reloc_idx = radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, &rtex->resource,
- RADEON_USAGE_READWRITE, RADEON_PRIO_HTILE);
+ RADEON_USAGE_READWRITE, RADEON_PRIO_SEPARATE_META);
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
radeon_emit(cs, reloc_idx);
} else {
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index d241d27d1b9..9f3779f16d4 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -1554,7 +1554,7 @@ static void r600_emit_db_state(struct r600_context *rctx, struct r600_atom *atom
radeon_set_context_reg(cs, R_028D24_DB_HTILE_SURFACE, a->rsurf->db_htile_surface);
radeon_set_context_reg(cs, R_028014_DB_HTILE_DATA_BASE, a->rsurf->db_htile_data_base);
reloc_idx = radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, &rtex->resource,
- RADEON_USAGE_READWRITE, RADEON_PRIO_HTILE);
+ RADEON_USAGE_READWRITE, RADEON_PRIO_SEPARATE_META);
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
radeon_emit(cs, reloc_idx);
} else {