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authorNicolai Hähnle <[email protected]>2017-01-27 10:35:13 +0100
committerNicolai Hähnle <[email protected]>2017-02-02 16:53:42 +0100
commita020cb3a72019748fee1824fc542b3b8225226c9 (patch)
tree0d672109379cb159e7671c8b315815c6d8046f64 /src/gallium/drivers/r600
parent96123dbad9f0de74e9b08d08df9e2e75cbfcd745 (diff)
gallium: turn PIPE_SHADER_CAP_DOUBLES into a screen capability
Make the cap consistent with PIPE_CAP_INT64. Aside from the hypothetical case of using draw for vertex shaders (and actually caring about doubles...), every implementation supports doubles either nowhere or everywhere. Also, st/mesa didn't even check the cap correctly in all supported shader stages. While at it, add a missing LLVM version check for 64-bit integers in radeonsi. This is conservative: judging by the log, LLVM 3.8 might be sufficient, but there are probably bugs that have been fixed since then. v2: fix clover (Marek) Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600')
-rw-r--r--src/gallium/drivers/r600/r600_pipe.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index e83ba32ef5a..2cc16b227a0 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -381,6 +381,14 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_INT64:
return 0;
+ case PIPE_CAP_DOUBLES:
+ if (rscreen->b.family == CHIP_ARUBA ||
+ rscreen->b.family == CHIP_CAYMAN ||
+ rscreen->b.family == CHIP_CYPRESS ||
+ rscreen->b.family == CHIP_HEMLOCK)
+ return 1;
+ return 0;
+
case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
if (family >= CHIP_CEDAR)
return 30;
@@ -555,7 +563,6 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
case PIPE_SHADER_CAP_SUPPORTED_IRS:
return 0;
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
- case PIPE_SHADER_CAP_DOUBLES:
if (rscreen->b.family == CHIP_ARUBA ||
rscreen->b.family == CHIP_CAYMAN ||
rscreen->b.family == CHIP_CYPRESS ||