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authorMarek Olšák <[email protected]>2017-08-19 18:33:02 +0200
committerMarek Olšák <[email protected]>2017-08-21 23:06:42 +0200
commitea1b97714d9bd443c178ee43b19bf10f9a17d3d5 (patch)
tree7967c401724295a1e508cb67b0a68258326bc701 /src/gallium/drivers/r600
parenta98b1a8922fa6990d0ab677770fc8ab6c9286a4b (diff)
r600g: don't set up and don't call the fetch shader if there are no VS inputs
Diffstat (limited to 'src/gallium/drivers/r600')
-rw-r--r--src/gallium/drivers/r600/evergreen_state.c3
-rw-r--r--src/gallium/drivers/r600/r600_shader.c2
-rw-r--r--src/gallium/drivers/r600/r600_state.c3
3 files changed, 7 insertions, 1 deletions
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 95953515ac2..764acfcad75 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -2298,6 +2298,9 @@ static void evergreen_emit_vertex_fetch_shader(struct r600_context *rctx, struct
struct r600_cso_state *state = (struct r600_cso_state*)a;
struct r600_fetch_shader *shader = (struct r600_fetch_shader*)state->cso;
+ if (!shader)
+ return;
+
radeon_set_context_reg(cs, R_0288A4_SQ_PGM_START_FS,
(shader->buffer->gpu_address + shader->offset) >> 8);
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 2eb8187341c..8c5e6ff72d6 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -3031,7 +3031,7 @@ static int r600_shader_from_tgsi(struct r600_context *rctx,
ctx.file_offset[i] = 0;
}
- if (ctx.type == PIPE_SHADER_VERTEX) {
+ if (ctx.type == PIPE_SHADER_VERTEX && ctx.info.num_inputs) {
ctx.file_offset[TGSI_FILE_INPUT] = 1;
r600_bytecode_add_cfinst(ctx.bc, CF_OP_CALL_FS);
}
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index dca8fe5e5bc..300dbe8040c 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -1898,6 +1898,9 @@ static void r600_emit_vertex_fetch_shader(struct r600_context *rctx, struct r600
struct r600_cso_state *state = (struct r600_cso_state*)a;
struct r600_fetch_shader *shader = (struct r600_fetch_shader*)state->cso;
+ if (!shader)
+ return;
+
radeon_set_context_reg(cs, R_028894_SQ_PGM_START_FS, shader->offset >> 8);
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, shader->buffer,