gallium/tgsi: Split sampler views from shader resources.

This commit splits the current concept of resource into "sampler
views" and "shader resources":

"Sampler views" are textures or buffers that are bound to a given
shader stage and can be read from in conjunction with a sampler
object.  They are analogous to OpenGL texture objects or Direct3D
SRVs.

"Shader resources" are textures or buffers that can be read and
written from a shader.  There's no support for floating point
coordinates, address wrap modes or filtering, and, unlike sampler
views, shader resources are global for the whole graphics pipeline.
They are analogous to OpenGL image objects (as in
ARB_shader_image_load_store) or Direct3D UAVs.

Most hardware is likely to implement shader resources and sampler
views as separate objects, so, having the distinction at the API level
simplifies things slightly for the driver.

This patch introduces the SVIEW register file with a declaration token
and syntax analogous to the already existing RES register file.  After
this change, the SAMPLE_* opcodes no longer accept a resource as
input, but rather a SVIEW object.  To preserve the functionality of
reading from a sampler view with integer coordinates, the
SAMPLE_I(_MS) opcodes are introduced which are similar to LOAD(_MS)
but take a SVIEW register instead of a RES register as argument.

1 files changed, 9 insertions, 9 deletions

diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index aa17f20761a..9e9ff1d772a 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -5220,16 +5220,16 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
 	{TGSI_OPCODE_CASE,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_DEFAULT,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_ENDSWITCH,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
-	{TGSI_OPCODE_LOAD,      0, 0, tgsi_unsupported},
-	{TGSI_OPCODE_LOAD_MS,   0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE,    0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_I,  0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_I_MS, 0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_B,  0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_C,  0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_C_LZ, 0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_D,  0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_L,  0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_GATHER4,   0, 0, tgsi_unsupported},
-	{TGSI_OPCODE_RESINFO,	0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SVIEWINFO,	0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_POS, 0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_INFO, 0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_UARL,      0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT, tgsi_r600_arl},
@@ -5394,16 +5394,16 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = {
 	{TGSI_OPCODE_CASE,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_DEFAULT,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_ENDSWITCH,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
-	{TGSI_OPCODE_LOAD,      0, 0, tgsi_unsupported},
-	{TGSI_OPCODE_LOAD_MS,   0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE,    0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_I,      0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_I_MS,   0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_B,  0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_C,  0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_C_LZ, 0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_D,  0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_L,  0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_GATHER4,   0, 0, tgsi_unsupported},
-	{TGSI_OPCODE_RESINFO,	0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SVIEWINFO,	0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_POS, 0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_INFO, 0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_UARL,      0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT, tgsi_eg_arl},
@@ -5568,16 +5568,16 @@ static struct r600_shader_tgsi_instruction cm_shader_tgsi_instruction[] = {
 	{TGSI_OPCODE_CASE,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_DEFAULT,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_ENDSWITCH,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
-	{TGSI_OPCODE_LOAD,      0, 0, tgsi_unsupported},
-	{TGSI_OPCODE_LOAD_MS,   0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE,    0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_I,      0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_I_MS,   0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_B,  0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_C,  0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_C_LZ, 0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_D,  0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_L,  0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_GATHER4,   0, 0, tgsi_unsupported},
-	{TGSI_OPCODE_RESINFO,	0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SVIEWINFO,	0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_POS, 0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_SAMPLE_INFO, 0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_UARL,      0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT, tgsi_eg_arl},