diff options
| author | Vadim Girlin <[email protected]> | 2013-04-21 19:11:36 +0400 |
|---|---|---|
| committer | Vadim Girlin <[email protected]> | 2013-04-30 21:50:47 +0400 |
| commit | d5b30fd03672dee3a73136d09f83b69381854e17 (patch) | |
| tree | ae4f8f6fa72a60489d0a0381d02d086bbce9b4e3 /src/gallium/drivers/r600 | |
| parent | a919424215ff1792fe7866c919872b2ecbe5cc3a (diff) | |
r600g: add new flags to isa instruction tables
Diffstat (limited to 'src/gallium/drivers/r600')
| -rw-r--r-- | src/gallium/drivers/r600/r600_isa.h | 243 |
1 files changed, 127 insertions, 116 deletions
diff --git a/src/gallium/drivers/r600/r600_isa.h b/src/gallium/drivers/r600/r600_isa.h index c6f115fc070..8cccc9d0d70 100644 --- a/src/gallium/drivers/r600/r600_isa.h +++ b/src/gallium/drivers/r600/r600_isa.h @@ -52,10 +52,10 @@ enum alu_op_flags AF_MOVA = (1<<8), /* all MOVA instructions */ AF_IEEE = (1<<10), - AF_INT = (1<<11), /* integer dst type */ - AF_UNSIGNED = (1<<12), /* unsigned dst (should be used with AF_INT) */ - - AF_UINT = (AF_INT | AF_UNSIGNED), + AF_DST_TYPE_MASK = (3<<11), + AF_FLOAT_DST = 0, + AF_INT_DST = (1<<11), + AF_UINT_DST = (3<<11), /* DP instructions, 2-slot pairs */ AF_64 = (1<<13), @@ -91,8 +91,16 @@ enum alu_op_flags AF_ANY_PRED = (AF_PRED | AF_PRED_PUSH), + AF_CMOV = (1 << 26), + + // for SETcc, PREDSETcc, ... - type of comparison + AF_CMP_TYPE_MASK = (3 << 27), + AF_FLOAT_CMP = 0, + AF_INT_CMP = (1 << 27), + AF_UINT_CMP = (3 << 27), + /* condition codes - 3 bits */ - AF_CC_SHIFT = 26, + AF_CC_SHIFT = 29, AF_CC_MASK = (7 << AF_CC_SHIFT), AF_CC_E = (0 << AF_CC_SHIFT), AF_CC_GT = (1 << AF_CC_SHIFT), @@ -109,10 +117,11 @@ enum fetch_op_flags FF_TEX = (1<<1), FF_SETGRAD = (1<<2), - FF_USEGRAD = (1<<3), + FF_GETGRAD = (1<<3), + FF_USEGRAD = (1<<4), - FF_VTX = (1<<4), - FF_MEM = (1<<5), + FF_VTX = (1<<5), + FF_MEM = (1<<6), }; /* flags for CF instructions */ @@ -133,7 +142,9 @@ enum cf_op_flags CF_EMIT = (1<<11), CF_STRM = (1<<12), /* MEM_STREAM* */ - CF_LOOP_START = (1<<13) + CF_RAT = (1<<13), /* MEM_RAT* */ + + CF_LOOP_START = (1<<14) }; /* ALU instruction info */ @@ -183,22 +194,22 @@ static const struct alu_op_info alu_op_table[] = { {"SETGT", 2, { 0x09, 0x09 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_GT }, {"SETGE", 2, { 0x0A, 0x0A },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_GE }, {"SETNE", 2, { 0x0B, 0x0B },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_NE }, - {"SETE_DX10", 2, { 0x0C, 0x0C },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_E | AF_DX10 }, - {"SETGT_DX10", 2, { 0x0D, 0x0D },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_GT | AF_DX10 }, - {"SETGE_DX10", 2, { 0x0E, 0x0E },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_GE | AF_DX10 }, - {"SETNE_DX10", 2, { 0x0F, 0x0F },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_NE | AF_DX10 }, + {"SETE_DX10", 2, { 0x0C, 0x0C },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_E | AF_DX10 | AF_INT_DST }, + {"SETGT_DX10", 2, { 0x0D, 0x0D },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_GT | AF_DX10 | AF_INT_DST }, + {"SETGE_DX10", 2, { 0x0E, 0x0E },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_GE | AF_DX10 | AF_INT_DST }, + {"SETNE_DX10", 2, { 0x0F, 0x0F },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_NE | AF_DX10 | AF_INT_DST }, {"FRACT", 1, { 0x10, 0x10 },{ AF_VS, AF_VS, AF_VS, AF_VS}, 0 }, {"TRUNC", 1, { 0x11, 0x11 },{ AF_VS, AF_VS, AF_VS, AF_VS}, 0 }, {"CEIL", 1, { 0x12, 0x12 },{ AF_VS, AF_VS, AF_VS, AF_VS}, 0 }, {"RNDNE", 1, { 0x13, 0x13 },{ AF_VS, AF_VS, AF_VS, AF_VS}, 0 }, {"FLOOR", 1, { 0x14, 0x14 },{ AF_VS, AF_VS, AF_VS, AF_VS}, 0 }, - {"ASHR_INT", 2, { 0x70, 0x15 },{ AF_S, AF_VS, AF_VS, AF_VS}, AF_INT }, - {"LSHR_INT", 2, { 0x71, 0x16 },{ AF_S, AF_VS, AF_VS, AF_VS}, AF_INT }, - {"LSHL_INT", 2, { 0x72, 0x17 },{ AF_S, AF_VS, AF_VS, AF_VS}, AF_INT }, + {"ASHR_INT", 2, { 0x70, 0x15 },{ AF_S, AF_VS, AF_VS, AF_VS}, AF_INT_DST }, + {"LSHR_INT", 2, { 0x71, 0x16 },{ AF_S, AF_VS, AF_VS, AF_VS}, AF_INT_DST }, + {"LSHL_INT", 2, { 0x72, 0x17 },{ AF_S, AF_VS, AF_VS, AF_VS}, AF_INT_DST }, {"MOV", 1, { 0x19, 0x19 },{ AF_VS, AF_VS, AF_VS, AF_VS}, 0 }, {"ALU_NOP", 0, { 0x1A, 0x1A },{ AF_VS, AF_VS, AF_VS, AF_VS}, 0 }, - {"PRED_SETGT_UINT", 2, { 0x1E, 0x1E },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED | AF_CC_GT | AF_UINT }, - {"PRED_SETGE_UINT", 2, { 0x1F, 0x1F },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED | AF_CC_GE | AF_UINT }, + {"PRED_SETGT_UINT", 2, { 0x1E, 0x1E },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED | AF_CC_GT | AF_UINT_CMP }, + {"PRED_SETGE_UINT", 2, { 0x1F, 0x1F },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED | AF_CC_GE | AF_UINT_CMP }, {"PRED_SETE", 2, { 0x20, 0x20 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED | AF_CC_E }, {"PRED_SETGT", 2, { 0x21, 0x21 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED | AF_CC_GT }, {"PRED_SETGE", 2, { 0x22, 0x22 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED | AF_CC_GE }, @@ -215,42 +226,42 @@ static const struct alu_op_info alu_op_table[] = { {"KILLGT", 2, { 0x2D, 0x2D },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_KILL | AF_CC_GT }, {"KILLGE", 2, { 0x2E, 0x2E },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_KILL | AF_CC_GE }, {"KILLNE", 2, { 0x2F, 0x2F },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_KILL | AF_CC_NE }, - {"AND_INT", 2, { 0x30, 0x30 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM | AF_M_ASSOC | AF_INT }, - {"OR_INT", 2, { 0x31, 0x31 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM | AF_M_ASSOC | AF_INT }, - {"XOR_INT", 2, { 0x32, 0x32 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM | AF_M_ASSOC | AF_INT }, - {"NOT_INT", 1, { 0x33, 0x33 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_INT }, - {"ADD_INT", 2, { 0x34, 0x34 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM | AF_M_ASSOC | AF_INT }, - {"SUB_INT", 2, { 0x35, 0x35 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_INT }, - {"MAX_INT", 2, { 0x36, 0x36 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM | AF_M_ASSOC | AF_INT }, - {"MIN_INT", 2, { 0x37, 0x37 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM | AF_M_ASSOC | AF_INT }, - {"MAX_UINT", 2, { 0x38, 0x38 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM | AF_M_ASSOC | AF_UINT }, - {"MIN_UINT", 2, { 0x39, 0x39 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM | AF_M_ASSOC | AF_UINT }, - {"SETE_INT", 2, { 0x3A, 0x3A },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_E | AF_INT }, - {"SETGT_INT", 2, { 0x3B, 0x3B },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_GT | AF_INT }, - {"SETGE_INT", 2, { 0x3C, 0x3C },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_GE | AF_INT }, - {"SETNE_INT", 2, { 0x3D, 0x3D },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_NE | AF_INT }, - {"SETGT_UINT", 2, { 0x3E, 0x3E },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_GT | AF_UINT }, - {"SETGE_UINT", 2, { 0x3F, 0x3F },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_GE | AF_UINT }, - {"KILLGT_UINT", 2, { 0x40, 0x40 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_KILL | AF_CC_GT | AF_UINT }, - {"KILLGE_UINT", 2, { 0x41, 0x41 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_KILL | AF_CC_GE | AF_UINT }, - {"PRED_SETE_INT", 2, { 0x42, 0x42 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED | AF_CC_E | AF_INT }, - {"PRED_SETGT_INT", 2, { 0x43, 0x43 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED | AF_CC_GT | AF_INT }, - {"PRED_SETGE_INT", 2, { 0x44, 0x44 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED | AF_CC_GE | AF_INT }, - {"PRED_SETNE_INT", 2, { 0x45, 0x45 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED | AF_CC_NE | AF_INT }, - {"KILLE_INT", 2, { 0x46, 0x46 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_KILL | AF_CC_E | AF_INT }, - {"KILLGT_INT", 2, { 0x47, 0x47 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_KILL | AF_CC_GT | AF_INT }, - {"KILLGE_INT", 2, { 0x48, 0x48 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_KILL | AF_CC_GE | AF_INT }, - {"KILLNE_INT", 2, { 0x49, 0x49 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_KILL | AF_CC_NE | AF_INT }, - {"PRED_SETE_PUSH_INT", 2, { 0x4A, 0x4A },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED_PUSH | AF_CC_E | AF_INT }, - {"PRED_SETGT_PUSH_INT", 2, { 0x4B, 0x4B },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED_PUSH | AF_CC_GT | AF_INT }, - {"PRED_SETGE_PUSH_INT", 2, { 0x4C, 0x4C },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED_PUSH | AF_CC_GE | AF_INT }, - {"PRED_SETNE_PUSH_INT", 2, { 0x4D, 0x4D },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED_PUSH | AF_CC_NE | AF_INT }, - {"PRED_SETLT_PUSH_INT", 2, { 0x4E, 0x4E },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED_PUSH | AF_CC_LT | AF_INT }, - {"PRED_SETLE_PUSH_INT", 2, { 0x4F, 0x4F },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED_PUSH | AF_CC_LE | AF_INT }, - {"FLT_TO_INT", 1, { 0x6B, 0x50 },{ AF_S, AF_S, AF_VS, AF_VS}, AF_INT | AF_CVT }, - {"BFREV_INT", 1, { -1, 0x51 },{ 0, 0, AF_VS, AF_VS}, AF_INT }, - {"ADDC_UINT", 2, { -1, 0x52 },{ 0, 0, AF_VS, AF_VS}, AF_UINT }, - {"SUBB_UINT", 2, { -1, 0x53 },{ 0, 0, AF_VS, AF_VS}, AF_UINT }, + {"AND_INT", 2, { 0x30, 0x30 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM | AF_M_ASSOC | AF_INT_DST }, + {"OR_INT", 2, { 0x31, 0x31 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM | AF_M_ASSOC | AF_INT_DST }, + {"XOR_INT", 2, { 0x32, 0x32 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM | AF_M_ASSOC | AF_INT_DST }, + {"NOT_INT", 1, { 0x33, 0x33 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_INT_DST }, + {"ADD_INT", 2, { 0x34, 0x34 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM | AF_M_ASSOC | AF_INT_DST }, + {"SUB_INT", 2, { 0x35, 0x35 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_INT_DST }, + {"MAX_INT", 2, { 0x36, 0x36 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM | AF_M_ASSOC | AF_INT_DST }, + {"MIN_INT", 2, { 0x37, 0x37 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM | AF_M_ASSOC | AF_INT_DST }, + {"MAX_UINT", 2, { 0x38, 0x38 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM | AF_M_ASSOC | AF_UINT_DST }, + {"MIN_UINT", 2, { 0x39, 0x39 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM | AF_M_ASSOC | AF_UINT_DST }, + {"SETE_INT", 2, { 0x3A, 0x3A },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_E | AF_INT_DST | AF_INT_CMP }, + {"SETGT_INT", 2, { 0x3B, 0x3B },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_GT | AF_INT_DST | AF_INT_CMP }, + {"SETGE_INT", 2, { 0x3C, 0x3C },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_GE | AF_INT_DST | AF_INT_CMP }, + {"SETNE_INT", 2, { 0x3D, 0x3D },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_NE | AF_INT_DST | AF_INT_CMP }, + {"SETGT_UINT", 2, { 0x3E, 0x3E },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_GT | AF_UINT_DST | AF_UINT_CMP }, + {"SETGE_UINT", 2, { 0x3F, 0x3F },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_SET | AF_CC_GE | AF_UINT_DST | AF_UINT_CMP }, + {"KILLGT_UINT", 2, { 0x40, 0x40 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_KILL | AF_CC_GT | AF_UINT_CMP }, + {"KILLGE_UINT", 2, { 0x41, 0x41 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_KILL | AF_CC_GE | AF_UINT_CMP }, + {"PRED_SETE_INT", 2, { 0x42, 0x42 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED | AF_CC_E | AF_INT_CMP }, + {"PRED_SETGT_INT", 2, { 0x43, 0x43 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED | AF_CC_GT | AF_INT_CMP }, + {"PRED_SETGE_INT", 2, { 0x44, 0x44 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED | AF_CC_GE | AF_INT_CMP }, + {"PRED_SETNE_INT", 2, { 0x45, 0x45 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED | AF_CC_NE | AF_INT_CMP }, + {"KILLE_INT", 2, { 0x46, 0x46 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_KILL | AF_CC_E | AF_INT_CMP }, + {"KILLGT_INT", 2, { 0x47, 0x47 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_KILL | AF_CC_GT | AF_INT_CMP }, + {"KILLGE_INT", 2, { 0x48, 0x48 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_KILL | AF_CC_GE | AF_INT_CMP }, + {"KILLNE_INT", 2, { 0x49, 0x49 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_KILL | AF_CC_NE | AF_INT_CMP }, + {"PRED_SETE_PUSH_INT", 2, { 0x4A, 0x4A },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED_PUSH | AF_CC_E | AF_INT_CMP }, + {"PRED_SETGT_PUSH_INT", 2, { 0x4B, 0x4B },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED_PUSH | AF_CC_GT | AF_INT_CMP }, + {"PRED_SETGE_PUSH_INT", 2, { 0x4C, 0x4C },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED_PUSH | AF_CC_GE | AF_INT_CMP }, + {"PRED_SETNE_PUSH_INT", 2, { 0x4D, 0x4D },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED_PUSH | AF_CC_NE | AF_INT_CMP }, + {"PRED_SETLT_PUSH_INT", 2, { 0x4E, 0x4E },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED_PUSH | AF_CC_LT | AF_INT_CMP }, + {"PRED_SETLE_PUSH_INT", 2, { 0x4F, 0x4F },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_PRED_PUSH | AF_CC_LE | AF_INT_CMP }, + {"FLT_TO_INT", 1, { 0x6B, 0x50 },{ AF_S, AF_S, AF_VS, AF_VS}, AF_INT_DST | AF_CVT }, + {"BFREV_INT", 1, { -1, 0x51 },{ 0, 0, AF_VS, AF_VS}, AF_INT_DST }, + {"ADDC_UINT", 2, { -1, 0x52 },{ 0, 0, AF_VS, AF_VS}, AF_UINT_DST }, + {"SUBB_UINT", 2, { -1, 0x53 },{ 0, 0, AF_VS, AF_VS}, AF_UINT_DST }, {"GROUP_BARRIER", 0, { -1, 0x54 },{ 0, 0, AF_VS, AF_VS}, 0 }, {"GROUP_SEQ_BEGIN", 0, { -1, 0x55 },{ 0, 0, AF_VS, 0}, 0 }, {"GROUP_SEQ_END", 0, { -1, 0x56 },{ 0, 0, AF_VS, 0}, 0 }, @@ -258,9 +269,9 @@ static const struct alu_op_info alu_op_table[] = { {"SET_CF_IDX0", 0, { -1, 0x58 },{ 0, 0, AF_VS, 0}, 0 }, {"SET_CF_IDX1", 0, { -1, 0x59 },{ 0, 0, AF_VS, 0}, 0 }, {"SET_LDS_SIZE", 2, { -1, 0x5A },{ 0, 0, AF_VS, AF_VS}, 0 }, - {"MUL_INT24", 2, { -1, 0x5B },{ 0, 0, 0, AF_V}, AF_INT | AF_24 }, - {"MULHI_INT24", 2, { -1, 0x5C },{ 0, 0, 0, AF_V}, AF_INT | AF_24 }, - {"FLT_TO_INT_TRUNC", 1, { -1, 0x5D },{ 0, 0, 0, AF_V}, AF_INT | AF_CVT}, + {"MUL_INT24", 2, { -1, 0x5B },{ 0, 0, 0, AF_V}, AF_INT_DST | AF_24 }, + {"MULHI_INT24", 2, { -1, 0x5C },{ 0, 0, 0, AF_V}, AF_INT_DST | AF_24 }, + {"FLT_TO_INT_TRUNC", 1, { -1, 0x5D },{ 0, 0, 0, AF_V}, AF_INT_DST | AF_CVT}, {"EXP_IEEE", 1, { 0x61, 0x81 },{ AF_S, AF_S, AF_S, AF_S}, AF_IEEE }, {"LOG_CLAMPED", 1, { 0x62, 0x82 },{ AF_S, AF_S, AF_S, AF_S}, 0 }, {"LOG_IEEE", 1, { 0x63, 0x83 },{ AF_S, AF_S, AF_S, AF_S}, AF_IEEE }, @@ -273,41 +284,41 @@ static const struct alu_op_info alu_op_table[] = { {"SQRT_IEEE", 1, { 0x6A, 0x8A },{ AF_S, AF_S, AF_S, AF_S}, AF_IEEE }, {"SIN", 1, { 0x6E, 0x8D },{ AF_S, AF_S, AF_S, AF_S}, 0 }, {"COS", 1, { 0x6F, 0x8E },{ AF_S, AF_S, AF_S, AF_S}, 0 }, - {"MULLO_INT", 2, { 0x73, 0x8F },{ AF_S, AF_S, AF_S, AF_4V}, AF_M_COMM | AF_INT | AF_REPL}, - {"MULHI_INT", 2, { 0x74, 0x90 },{ AF_S, AF_S, AF_S, AF_4V}, AF_M_COMM | AF_INT | AF_REPL}, - {"MULLO_UINT", 2, { 0x75, 0x91 },{ AF_S, AF_S, AF_S, AF_4V}, AF_M_COMM | AF_UINT | AF_REPL}, - {"MULHI_UINT", 2, { 0x76, 0x92 },{ AF_S, AF_S, AF_S, AF_4V}, AF_M_COMM | AF_UINT | AF_REPL}, - {"RECIP_INT", 1, { 0x77, 0x93 },{ AF_S, AF_S, AF_S, 0}, AF_INT }, - {"RECIP_UINT", 1, { 0x78, 0x94 },{ AF_S, AF_S, AF_S, 0}, AF_UINT }, + {"MULLO_INT", 2, { 0x73, 0x8F },{ AF_S, AF_S, AF_S, AF_4V}, AF_M_COMM | AF_INT_DST | AF_REPL}, + {"MULHI_INT", 2, { 0x74, 0x90 },{ AF_S, AF_S, AF_S, AF_4V}, AF_M_COMM | AF_INT_DST | AF_REPL}, + {"MULLO_UINT", 2, { 0x75, 0x91 },{ AF_S, AF_S, AF_S, AF_4V}, AF_M_COMM | AF_UINT_DST | AF_REPL}, + {"MULHI_UINT", 2, { 0x76, 0x92 },{ AF_S, AF_S, AF_S, AF_4V}, AF_M_COMM | AF_UINT_DST | AF_REPL}, + {"RECIP_INT", 1, { 0x77, 0x93 },{ AF_S, AF_S, AF_S, 0}, AF_INT_DST }, + {"RECIP_UINT", 1, { 0x78, 0x94 },{ AF_S, AF_S, AF_S, 0}, AF_UINT_DST }, {"RECIP_64", 2, { -1, 0x95 },{ 0, 0, AF_S, AF_S}, AF_64 }, {"RECIP_CLAMPED_64", 2, { -1, 0x96 },{ 0, 0, AF_S, AF_S}, AF_64 }, {"RECIPSQRT_64", 2, { -1, 0x97 },{ 0, 0, AF_S, AF_S}, AF_64 }, {"RECIPSQRT_CLAMPED_64", 2, { -1, 0x98 },{ 0, 0, AF_S, AF_S}, AF_64 }, {"SQRT_64", 2, { -1, 0x99 },{ 0, 0, AF_S, AF_S}, AF_64 }, - {"FLT_TO_UINT", 1, { 0x79, 0x9A },{ AF_S, AF_S, AF_S, AF_V}, AF_UINT | AF_CVT}, + {"FLT_TO_UINT", 1, { 0x79, 0x9A },{ AF_S, AF_S, AF_S, AF_V}, AF_UINT_DST | AF_CVT}, {"INT_TO_FLT", 1, { 0x6C, 0x9B },{ AF_S, AF_S, AF_S, AF_V}, AF_CVT}, {"UINT_TO_FLT", 1, { 0x6D, 0x9C },{ AF_S, AF_S, AF_S, AF_V}, AF_CVT }, - {"BFM_INT", 2, { -1, 0xA0 },{ 0, 0, AF_V, AF_V}, AF_INT }, + {"BFM_INT", 2, { -1, 0xA0 },{ 0, 0, AF_V, AF_V}, AF_INT_DST }, {"FLT32_TO_FLT16", 1, { -1, 0xA2 },{ 0, 0, AF_V, AF_V}, 0 }, {"FLT16_TO_FLT32", 1, { -1, 0xA3 },{ 0, 0, AF_V, AF_V}, 0 }, {"UBYTE0_FLT", 1, { -1, 0xA4 },{ 0, 0, AF_V, AF_V}, 0 }, {"UBYTE1_FLT", 1, { -1, 0xA5 },{ 0, 0, AF_V, AF_V}, 0 }, {"UBYTE2_FLT", 1, { -1, 0xA6 },{ 0, 0, AF_V, AF_V}, 0 }, {"UBYTE3_FLT", 1, { -1, 0xA7 },{ 0, 0, AF_V, AF_V}, 0 }, - {"BCNT_INT", 1, { -1, 0xAA },{ 0, 0, AF_V, AF_V}, AF_INT }, - {"FFBH_UINT", 1, { -1, 0xAB },{ 0, 0, AF_V, AF_V}, AF_UINT }, - {"FFBL_INT", 1, { -1, 0xAC },{ 0, 0, AF_V, AF_V}, AF_INT }, - {"FFBH_INT", 1, { -1, 0xAD },{ 0, 0, AF_V, AF_V}, AF_INT }, - {"FLT_TO_UINT4", 1, { -1, 0xAE },{ 0, 0, AF_V, AF_V}, AF_UINT }, + {"BCNT_INT", 1, { -1, 0xAA },{ 0, 0, AF_V, AF_V}, AF_INT_DST }, + {"FFBH_UINT", 1, { -1, 0xAB },{ 0, 0, AF_V, AF_V}, AF_UINT_DST }, + {"FFBL_INT", 1, { -1, 0xAC },{ 0, 0, AF_V, AF_V}, AF_INT_DST }, + {"FFBH_INT", 1, { -1, 0xAD },{ 0, 0, AF_V, AF_V}, AF_INT_DST }, + {"FLT_TO_UINT4", 1, { -1, 0xAE },{ 0, 0, AF_V, AF_V}, AF_UINT_DST }, {"DOT_IEEE", 2, { -1, 0xAF },{ 0, 0, AF_V, AF_V}, AF_PREV_NEXT | AF_IEEE }, - {"FLT_TO_INT_RPI", 1, { -1, 0xB0 },{ 0, 0, AF_V, AF_V}, AF_INT | AF_CVT}, - {"FLT_TO_INT_FLOOR", 1, { -1, 0xB1 },{ 0, 0, AF_V, AF_V}, AF_INT | AF_CVT}, - {"MULHI_UINT24", 2, { -1, 0xB2 },{ 0, 0, AF_V, AF_V}, AF_UINT | AF_24 }, - {"MBCNT_32HI_INT", 1, { -1, 0xB3 },{ 0, 0, AF_V, AF_V}, AF_INT }, + {"FLT_TO_INT_RPI", 1, { -1, 0xB0 },{ 0, 0, AF_V, AF_V}, AF_INT_DST | AF_CVT}, + {"FLT_TO_INT_FLOOR", 1, { -1, 0xB1 },{ 0, 0, AF_V, AF_V}, AF_INT_DST | AF_CVT}, + {"MULHI_UINT24", 2, { -1, 0xB2 },{ 0, 0, AF_V, AF_V}, AF_UINT_DST | AF_24 }, + {"MBCNT_32HI_INT", 1, { -1, 0xB3 },{ 0, 0, AF_V, AF_V}, AF_INT_DST }, {"OFFSET_TO_FLT", 1, { -1, 0xB4 },{ 0, 0, AF_V, AF_V}, 0 }, - {"MUL_UINT24", 2, { -1, 0xB5 },{ 0, 0, AF_V, AF_V}, AF_UINT | AF_24 }, - {"BCNT_ACCUM_PREV_INT", 1, { -1, 0xB6 },{ 0, 0, AF_V, AF_V}, AF_INT | AF_PREV_NEXT }, - {"MBCNT_32LO_ACCUM_PREV_INT", 1, { -1, 0xB7 },{ 0, 0, AF_V, AF_V}, AF_INT | AF_PREV_NEXT }, + {"MUL_UINT24", 2, { -1, 0xB5 },{ 0, 0, AF_V, AF_V}, AF_UINT_DST | AF_24 }, + {"BCNT_ACCUM_PREV_INT", 1, { -1, 0xB6 },{ 0, 0, AF_V, AF_V}, AF_INT_DST | AF_PREV_NEXT }, + {"MBCNT_32LO_ACCUM_PREV_INT", 1, { -1, 0xB7 },{ 0, 0, AF_V, AF_V}, AF_INT_DST | AF_PREV_NEXT }, {"SETE_64", 2, { -1, 0xB8 },{ 0, 0, AF_V, AF_V}, AF_SET | AF_CC_E | AF_64 }, {"SETNE_64", 2, { -1, 0xB9 },{ 0, 0, AF_V, AF_V}, AF_SET | AF_CC_NE | AF_64 }, {"SETGT_64", 2, { -1, 0xBA },{ 0, 0, AF_V, AF_V}, AF_SET | AF_CC_GT | AF_64 }, @@ -326,10 +337,10 @@ static const struct alu_op_info alu_op_table[] = { {"PRED_SETGE_64", 2, { 0x7E, 0xC9 },{ AF_V, AF_V, AF_V, AF_V}, AF_PRED | AF_CC_GE | AF_64 }, {"MUL_64", 2, { 0x1B, 0xCA },{ AF_V, AF_V, AF_V, AF_V}, AF_64 }, {"ADD_64", 2, { 0x17, 0xCB },{ AF_V, AF_V, AF_V, AF_V}, AF_64 }, - {"MOVA_INT", 1, { 0x18, 0xCC },{ AF_V, AF_V, AF_V, AF_V}, AF_MOVA | AF_INT }, + {"MOVA_INT", 1, { 0x18, 0xCC },{ AF_V, AF_V, AF_V, AF_V}, AF_MOVA }, {"FLT64_TO_FLT32", 1, { 0x1C, 0xCD },{ AF_V, AF_V, AF_V, AF_V}, 0 }, {"FLT32_TO_FLT64", 1, { 0x1D, 0xCE },{ AF_V, AF_V, AF_V, AF_V}, 0 }, - {"SAD_ACCUM_PREV_UINT", 2, { -1, 0xCF },{ 0, 0, AF_V, AF_V}, AF_UINT | AF_PREV_NEXT }, + {"SAD_ACCUM_PREV_UINT", 2, { -1, 0xCF },{ 0, 0, AF_V, AF_V}, AF_UINT_DST | AF_PREV_NEXT }, {"DOT", 2, { -1, 0xD0 },{ 0, 0, AF_V, AF_V}, AF_PREV_NEXT }, {"MUL_PREV", 1, { -1, 0xD1 },{ 0, 0, AF_V, AF_V}, AF_PREV_INTERLEAVE }, {"MUL_IEEE_PREV", 1, { -1, 0xD2 },{ 0, 0, AF_V, AF_V}, AF_PREV_INTERLEAVE | AF_IEEE }, @@ -345,39 +356,39 @@ static const struct alu_op_info alu_op_table[] = { {"LDS_1A", 2, { -1, 0xDC },{ 0, 0, AF_V, AF_V}, 0 }, {"LDS_1A1D", 2, { -1, 0xDD },{ 0, 0, AF_V, AF_V}, 0 }, {"LDS_2A", 2, { -1, 0xDF },{ 0, 0, AF_V, AF_V}, 0 }, - {"INTERP_LOAD_P0", 1, { -1, 0xE0 },{ 0, 0, AF_V, AF_V}, 0 }, - {"INTERP_LOAD_P10", 1, { -1, 0xE1 },{ 0, 0, AF_V, AF_V}, 0 }, - {"INTERP_LOAD_P20", 1, { -1, 0xE2 },{ 0, 0, AF_V, AF_V}, 0 }, - {"BFE_UINT", 3, { -1, 0x04 },{ 0, 0, AF_V, AF_V}, AF_UINT }, - {"BFE_INT", 3, { -1, 0x05 },{ 0, 0, AF_V, AF_V}, AF_INT }, - {"BFI_INT", 3, { -1, 0x06 },{ 0, 0, AF_V, AF_V}, AF_INT }, + {"INTERP_LOAD_P0", 1, { -1, 0xE0 },{ 0, 0, AF_V, AF_V}, AF_INTERP }, + {"INTERP_LOAD_P10", 1, { -1, 0xE1 },{ 0, 0, AF_V, AF_V}, AF_INTERP }, + {"INTERP_LOAD_P20", 1, { -1, 0xE2 },{ 0, 0, AF_V, AF_V}, AF_INTERP }, + {"BFE_UINT", 3, { -1, 0x04 },{ 0, 0, AF_V, AF_V}, AF_UINT_DST }, + {"BFE_INT", 3, { -1, 0x05 },{ 0, 0, AF_V, AF_V}, AF_INT_DST }, + {"BFI_INT", 3, { -1, 0x06 },{ 0, 0, AF_V, AF_V}, AF_INT_DST }, {"FMA", 3, { -1, 0x07 },{ 0, 0, AF_V, AF_V}, 0 }, - {"MULADD_INT24", 3, { -1, 0x08 },{ 0, 0, 0, AF_V}, AF_INT | AF_24 }, - {"CNDNE_64", 3, { -1, 0x09 },{ 0, 0, AF_V, AF_V}, AF_64 }, + {"MULADD_INT24", 3, { -1, 0x08 },{ 0, 0, 0, AF_V}, AF_INT_DST | AF_24 }, + {"CNDNE_64", 3, { -1, 0x09 },{ 0, 0, AF_V, AF_V}, AF_CMOV | AF_64 }, {"FMA_64", 3, { -1, 0x0A },{ 0, 0, AF_V, AF_V}, AF_64 }, - {"LERP_UINT", 3, { -1, 0x0B },{ 0, 0, AF_V, AF_V}, AF_UINT }, - {"BIT_ALIGN_INT", 3, { -1, 0x0C },{ 0, 0, AF_V, AF_V}, AF_INT }, - {"BYTE_ALIGN_INT", 3, { -1, 0x0D },{ 0, 0, AF_V, AF_V}, AF_INT }, - {"SAD_ACCUM_UINT", 3, { -1, 0x0E },{ 0, 0, AF_V, AF_V}, AF_UINT }, - {"SAD_ACCUM_HI_UINT", 3, { -1, 0x0F },{ 0, 0, AF_V, AF_V}, AF_UINT }, - {"MULADD_UINT24", 3, { -1, 0x10 },{ 0, 0, AF_V, AF_V}, AF_UINT | AF_24 }, + {"LERP_UINT", 3, { -1, 0x0B },{ 0, 0, AF_V, AF_V}, AF_UINT_DST }, + {"BIT_ALIGN_INT", 3, { -1, 0x0C },{ 0, 0, AF_V, AF_V}, AF_INT_DST }, + {"BYTE_ALIGN_INT", 3, { -1, 0x0D },{ 0, 0, AF_V, AF_V}, AF_INT_DST }, + {"SAD_ACCUM_UINT", 3, { -1, 0x0E },{ 0, 0, AF_V, AF_V}, AF_UINT_DST }, + {"SAD_ACCUM_HI_UINT", 3, { -1, 0x0F },{ 0, 0, AF_V, AF_V}, AF_UINT_DST }, + {"MULADD_UINT24", 3, { -1, 0x10 },{ 0, 0, AF_V, AF_V}, AF_UINT_DST | AF_24 }, {"LDS_IDX_OP", 3, { -1, 0x11 },{ 0, 0, AF_V, AF_V}, 0 }, {"MULADD", 3, { 0x10, 0x14 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM }, {"MULADD_M2", 3, { 0x11, 0x15 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM }, {"MULADD_M4", 3, { 0x12, 0x16 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM }, {"MULADD_D2", 3, { 0x13, 0x17 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM }, {"MULADD_IEEE", 3, { 0x14, 0x18 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_M_COMM | AF_IEEE }, - {"CNDE", 3, { 0x18, 0x19 },{ AF_VS, AF_VS, AF_VS, AF_VS}, 0 }, - {"CNDGT", 3, { 0x19, 0x1A },{ AF_VS, AF_VS, AF_VS, AF_VS}, 0 }, - {"CNDGE", 3, { 0x1A, 0x1B },{ AF_VS, AF_VS, AF_VS, AF_VS}, 0 }, - {"CNDE_INT", 3, { 0x1C, 0x1C },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_INT }, - {"CNDGT_INT", 3, { 0x1D, 0x1D },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_INT }, - {"CNDGE_INT", 3, { 0x1E, 0x1E },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_INT }, + {"CNDE", 3, { 0x18, 0x19 },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_CMOV | AF_CC_E }, + {"CNDGT", 3, { 0x19, 0x1A },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_CMOV | AF_CC_GT }, + {"CNDGE", 3, { 0x1A, 0x1B },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_CMOV | AF_CC_GE }, + {"CNDE_INT", 3, { 0x1C, 0x1C },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_CMOV | AF_CC_E | AF_INT_CMP }, + {"CNDGT_INT", 3, { 0x1D, 0x1D },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_CMOV | AF_CC_GT | AF_INT_CMP }, + {"CNDGE_INT", 3, { 0x1E, 0x1E },{ AF_VS, AF_VS, AF_VS, AF_VS}, AF_CMOV | AF_CC_GE | AF_INT_CMP }, {"MUL_LIT", 3, { 0x0C, 0x1F },{ AF_S, AF_S, AF_S, AF_V}, 0 }, {"MOVA", 1, { 0x15, -1 },{ AF_V, AF_V, 0, 0}, AF_MOVA }, {"MOVA_FLOOR", 1, { 0x16, -1 },{ AF_V, AF_V, 0, 0}, AF_MOVA }, - {"MOVA_GPR_INT", 1, { 0x60, -1 },{ AF_S, 0, 0, 0}, AF_MOVA | AF_INT }, + {"MOVA_GPR_INT", 1, { 0x60, -1 },{ AF_S, 0, 0, 0}, AF_MOVA }, {"MULADD_64", 3, { 0x08, -1 },{ AF_V, AF_V, 0, 0}, AF_64 }, {"MULADD_64_M2", 3, { 0x09, -1 },{ AF_V, AF_V, 0, 0}, AF_64 }, @@ -395,10 +406,10 @@ static const struct alu_op_info alu_op_table[] = { {"LDS_RSUB", 2, { -1, 0x0211 },{ 0, 0, AF_V, AF_V}, AF_LDS }, {"LDS_INC", 2, { -1, 0x0311 },{ 0, 0, AF_V, AF_V}, AF_LDS }, {"LDS_DEC", 2, { -1, 0x0411 },{ 0, 0, AF_V, AF_V}, AF_LDS }, - {"LDS_MIN_INT", 2, { -1, 0x0511 },{ 0, 0, AF_V, AF_V}, AF_LDS | AF_INT }, - {"LDS_MAX_INT", 2, { -1, 0x0611 },{ 0, 0, AF_V, AF_V}, AF_LDS | AF_INT }, - {"LDS_MIN_UINT", 2, { -1, 0x0711 },{ 0, 0, AF_V, AF_V}, AF_LDS | AF_UINT }, - {"LDS_MAX_UINT", 2, { -1, 0x0811 },{ 0, 0, AF_V, AF_V}, AF_LDS | AF_UINT }, + {"LDS_MIN_INT", 2, { -1, 0x0511 },{ 0, 0, AF_V, AF_V}, AF_LDS | AF_INT_DST }, + {"LDS_MAX_INT", 2, { -1, 0x0611 },{ 0, 0, AF_V, AF_V}, AF_LDS | AF_INT_DST }, + {"LDS_MIN_UINT", 2, { -1, 0x0711 },{ 0, 0, AF_V, AF_V}, AF_LDS | AF_UINT_DST }, + {"LDS_MAX_UINT", 2, { -1, 0x0811 },{ 0, 0, AF_V, AF_V}, AF_LDS | AF_UINT_DST }, {"LDS_AND", 2, { -1, 0x0911 },{ 0, 0, AF_V, AF_V}, AF_LDS }, {"LDS_OR", 2, { -1, 0x0A11 },{ 0, 0, AF_V, AF_V}, AF_LDS }, {"LDS_XOR", 2, { -1, 0x0B11 },{ 0, 0, AF_V, AF_V}, AF_LDS }, @@ -415,10 +426,10 @@ static const struct alu_op_info alu_op_table[] = { {"LDS_RSUB_RET", 2, { -1, 0x2211 },{ 0, 0, AF_V, AF_V}, AF_LDS }, {"LDS_INC_RET", 2, { -1, 0x2311 },{ 0, 0, AF_V, AF_V}, AF_LDS }, {"LDS_DEC_RET", 2, { -1, 0x2411 },{ 0, 0, AF_V, AF_V}, AF_LDS }, - {"LDS_MIN_INT_RET", 2, { -1, 0x2511 },{ 0, 0, AF_V, AF_V}, AF_LDS | AF_INT }, - {"LDS_MAX_INT_RET", 2, { -1, 0x2611 },{ 0, 0, AF_V, AF_V}, AF_LDS | AF_INT }, - {"LDS_MIN_UINT_RET", 2, { -1, 0x2711 },{ 0, 0, AF_V, AF_V}, AF_LDS | AF_UINT }, - {"LDS_MAX_UINT_RET", 2, { -1, 0x2811 },{ 0, 0, AF_V, AF_V}, AF_LDS | AF_UINT }, + {"LDS_MIN_INT_RET", 2, { -1, 0x2511 },{ 0, 0, AF_V, AF_V}, AF_LDS | AF_INT_DST }, + {"LDS_MAX_INT_RET", 2, { -1, 0x2611 },{ 0, 0, AF_V, AF_V}, AF_LDS | AF_INT_DST }, + {"LDS_MIN_UINT_RET", 2, { -1, 0x2711 },{ 0, 0, AF_V, AF_V}, AF_LDS | AF_UINT_DST }, + {"LDS_MAX_UINT_RET", 2, { -1, 0x2811 },{ 0, 0, AF_V, AF_V}, AF_LDS | AF_UINT_DST }, {"LDS_AND_RET", 2, { -1, 0x2911 },{ 0, 0, AF_V, AF_V}, AF_LDS }, {"LDS_OR_RET", 2, { -1, 0x2A11 },{ 0, 0, AF_V, AF_V}, AF_LDS }, {"LDS_XOR_RET", 2, { -1, 0x2B11 },{ 0, 0, AF_V, AF_V}, AF_LDS }, @@ -506,10 +517,10 @@ static const struct fetch_op_info fetch_op_table[] = { {"GET_TEXTURE_RESINFO", { 0x000004, 0x000004, 0x000004, 0x000004 }, 0 }, {"GET_NUMBER_OF_SAMPLES", { 0x000005, 0x000005, 0x000005, 0x000005 }, 0 }, {"GET_LOD", { 0x000006, 0x000006, 0x000006, 0x000006 }, 0 }, - {"GET_GRADIENTS_H", { 0x000007, 0x000007, 0x000007, 0x000007 }, 0 }, - {"GET_GRADIENTS_V", { 0x000008, 0x000008, 0x000008, 0x000008 }, 0 }, - {"GET_GRADIENTS_H_FINE", { -1, -1, 0x000107, 0x000107 }, 0 }, - {"GET_GRADIENTS_V_FINE", { -1, -1, 0x000108, 0x000108 }, 0 }, + {"GET_GRADIENTS_H", { 0x000007, 0x000007, 0x000007, 0x000007 }, FF_GETGRAD }, + {"GET_GRADIENTS_V", { 0x000008, 0x000008, 0x000008, 0x000008 }, FF_GETGRAD }, + {"GET_GRADIENTS_H_FINE", { -1, -1, 0x000107, 0x000107 }, FF_GETGRAD }, + {"GET_GRADIENTS_V_FINE", { -1, -1, 0x000108, 0x000108 }, FF_GETGRAD }, {"GET_LERP", { 0x000009, 0x000009, -1, -1 }, 0 }, {"SET_TEXTURE_OFFSETS", { -1, -1, 0x000009, 0x000009 }, 0 }, {"KEEP_GRADIENTS", { -1, 0x00000A, 0x00000A, 0x00000A }, 0 }, @@ -632,14 +643,14 @@ static const struct cf_op_info cf_op_table[] = { {"EXPORT_DONE", { 0x28, 0x28, 0x54, 0x54 }, CF_EXP }, {"MEM_EXPORT", { -1, 0x3A, 0x55, 0x55 }, CF_MEM }, - {"MEM_RAT", { -1, -1, 0x56, 0x56 }, CF_MEM }, - {"MEM_RAT_NOCACHE", { -1, -1, 0x57, 0x57 }, CF_MEM }, + {"MEM_RAT", { -1, -1, 0x56, 0x56 }, CF_MEM | CF_RAT }, + {"MEM_RAT_NOCACHE", { -1, -1, 0x57, 0x57 }, CF_MEM | CF_RAT }, {"MEM_RING1", { -1, -1, 0x58, 0x58 }, CF_MEM }, {"MEM_RING2", { -1, -1, 0x59, 0x59 }, CF_MEM }, {"MEM_RING3", { -1, -1, 0x5A, 0x5A }, CF_MEM }, {"MEM_MEM_COMBINED", { -1, -1, 0x5B, 0x5B }, CF_MEM }, - {"MEM_RAT_COMBINED_NOCACHE", { -1, -1, 0x5C, 0x5C }, CF_MEM }, - {"MEM_RAT_COMBINED", { -1, -1, -1, 0x5D }, CF_MEM }, /* ??? not in cayman isa doc */ + {"MEM_RAT_COMBINED_NOCACHE", { -1, -1, 0x5C, 0x5C }, CF_MEM | CF_RAT }, + {"MEM_RAT_COMBINED", { -1, -1, -1, 0x5D }, CF_MEM | CF_RAT }, /* ??? not in cayman isa doc */ {"EXPORT_DONE_END", { -1, -1, -1, 0x5E }, CF_EXP }, /* ??? not in cayman isa doc */ |