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authorTom Stellard <[email protected]>2012-05-08 11:33:05 -0400
committerTom Stellard <[email protected]>2012-05-08 15:47:46 -0400
commit8a4c25dd7e9002ab7a2821753bcae1ff6af2ca1c (patch)
treeae8937d37db47fd29e2ace1d1bc4e45b4585ca65 /src/gallium/drivers/r600
parent94e797d0faed18dfa80bcce7a6d03ef369b6a820 (diff)
radeon/llvm: Use a custom inserter to lower RESERVE_REG
Diffstat (limited to 'src/gallium/drivers/r600')
-rw-r--r--src/gallium/drivers/r600/r600_llvm.c8
1 files changed, 2 insertions, 6 deletions
diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c
index 2f830095883..b01cb7a161d 100644
--- a/src/gallium/drivers/r600/r600_llvm.c
+++ b/src/gallium/drivers/r600/r600_llvm.c
@@ -93,17 +93,13 @@ static void llvm_emit_prologue(struct lp_build_tgsi_context * bld_base)
for (i = 0; i < ctx->reserved_reg_count; i++) {
unsigned chan;
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
- LLVMValueRef reg;
LLVMValueRef reg_index = lp_build_const_int32(
base->gallivm,
radeon_llvm_reg_index_soa(i, chan));
- reg = lp_build_intrinsic_unary(base->gallivm->builder,
- "llvm.AMDGPU.reserve.reg",
- base->elem_type, reg_index);
lp_build_intrinsic_unary(base->gallivm->builder,
- "llvm.AMDGPU.export.reg",
+ "llvm.AMDGPU.reserve.reg",
LLVMVoidTypeInContext(base->gallivm->context),
- reg);
+ reg_index);
}
}
}