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authorJerome Glisse <[email protected]>2013-01-04 16:34:52 -0500
committerJerome Glisse <[email protected]>2013-01-07 11:06:07 -0500
commitca474f98f2cda5cb333e9f851c7e0e31c9a6f823 (patch)
tree8e046880ece999573bb7dae4b471156c96a06fcf /src/gallium/drivers/r600
parentd499ff98cd69c9ec6c43ad8ececa4c3b61889ab9 (diff)
radeon/winsys: move radeon family/class identification to winsys
Upcoming async dma support rely on winsys knowing about GPU families. Signed-off-by: Jerome Glisse <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600')
-rw-r--r--src/gallium/drivers/r600/r600.h37
-rw-r--r--src/gallium/drivers/r600/r600_asm.c5
-rw-r--r--src/gallium/drivers/r600/r600_pipe.c32
-rw-r--r--src/gallium/drivers/r600/r600_shader.c1
4 files changed, 13 insertions, 62 deletions
diff --git a/src/gallium/drivers/r600/r600.h b/src/gallium/drivers/r600/r600.h
index b6f7d0384e2..260536ecb44 100644
--- a/src/gallium/drivers/r600/r600.h
+++ b/src/gallium/drivers/r600/r600.h
@@ -35,43 +35,6 @@
struct winsys_handle;
-enum radeon_family {
- CHIP_UNKNOWN,
- CHIP_R600,
- CHIP_RV610,
- CHIP_RV630,
- CHIP_RV670,
- CHIP_RV620,
- CHIP_RV635,
- CHIP_RS780,
- CHIP_RS880,
- CHIP_RV770,
- CHIP_RV730,
- CHIP_RV710,
- CHIP_RV740,
- CHIP_CEDAR,
- CHIP_REDWOOD,
- CHIP_JUNIPER,
- CHIP_CYPRESS,
- CHIP_HEMLOCK,
- CHIP_PALM,
- CHIP_SUMO,
- CHIP_SUMO2,
- CHIP_BARTS,
- CHIP_TURKS,
- CHIP_CAICOS,
- CHIP_CAYMAN,
- CHIP_ARUBA,
- CHIP_LAST,
-};
-
-enum chip_class {
- R600,
- R700,
- EVERGREEN,
- CAYMAN,
-};
-
struct r600_tiling_info {
unsigned num_channels;
unsigned num_banks;
diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c
index 268137ff2e7..ef677170a5b 100644
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src/gallium/drivers/r600/r600_asm.c
@@ -40,6 +40,7 @@ static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode *
return 3;
switch (bc->chip_class) {
+ default:
case R600:
case R700:
switch (alu->inst) {
@@ -201,8 +202,8 @@ static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode *
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_INT:
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_UINT:
return 1;
- default: R600_ERR(
- "Need instruction operand number for 0x%x.\n", alu->inst);
+ default:
+ R600_ERR("Need instruction operand number for 0x%x.\n", alu->inst);
}
break;
}
diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index 7a7a4315ec8..29ef988372b 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -917,17 +917,6 @@ static int r600_init_tiling(struct r600_screen *rscreen)
}
}
-static unsigned radeon_family_from_device(unsigned device)
-{
- switch (device) {
-#define CHIPSET(pciid, name, family) case pciid: return CHIP_##family;
-#include "pci_ids/r600_pci_ids.h"
-#undef CHIPSET
- default:
- return CHIP_UNKNOWN;
- }
-}
-
static uint64_t r600_get_timestamp(struct pipe_screen *screen)
{
struct r600_screen *rscreen = (struct r600_screen*)screen;
@@ -947,24 +936,14 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
rscreen->ws = ws;
ws->query_info(ws, &rscreen->info);
- rscreen->family = radeon_family_from_device(rscreen->info.pci_id);
+ rscreen->family = rscreen->info.family;
+ rscreen->chip_class = rscreen->info.chip_class;
if (rscreen->family == CHIP_UNKNOWN) {
fprintf(stderr, "r600: Unknown chipset 0x%04X\n", rscreen->info.pci_id);
FREE(rscreen);
return NULL;
}
- /* setup class */
- if (rscreen->family >= CHIP_CAYMAN) {
- rscreen->chip_class = CAYMAN;
- } else if (rscreen->family >= CHIP_CEDAR) {
- rscreen->chip_class = EVERGREEN;
- } else if (rscreen->family >= CHIP_RV770) {
- rscreen->chip_class = R700;
- } else {
- rscreen->chip_class = R600;
- }
-
/* Figure out streamout kernel support. */
switch (rscreen->chip_class) {
case R600:
@@ -981,6 +960,9 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
case CAYMAN:
rscreen->has_streamout = rscreen->info.drm_minor >= 14;
break;
+ default:
+ rscreen->has_streamout = FALSE;
+ break;
}
/* MSAA support. */
@@ -1001,6 +983,10 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
/* We should be able to read compressed MSAA textures, but it doesn't work. */
rscreen->msaa_texture_support = MSAA_TEXTURE_SAMPLE_ZERO;
break;
+ default:
+ rscreen->has_msaa = FALSE;
+ rscreen->msaa_texture_support = 0;
+ break;
}
if (r600_init_tiling(rscreen)) {
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index bca62ad8494..db45dfd2266 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -326,6 +326,7 @@ static unsigned r600_alu_from_byte_stream(struct r600_shader_ctx *ctx,
word1 = i32_from_byte_stream(bytes, &bytes_read);
switch(ctx->bc->chip_class) {
+ default:
case R600:
r600_bytecode_alu_read(&alu, word0, word1);
break;