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authorNicolai Hähnle <[email protected]>2016-05-06 17:14:29 -0500
committerNicolai Hähnle <[email protected]>2016-06-01 22:52:20 +0200
commit89ba076de4c8cfa171365700e6a3b017d5e3eeff (patch)
tree26319856e9ee655d47e938596798c42226e39cb0 /src/gallium/drivers/r600
parenta7c26bfc0ce9d12def9f05a84c19f51f3d311aaa (diff)
radeon/winsys: introduce radeon_winsys_cs_chunk
We will chain multiple chunks together and will keep pointers to the older chunks to support IB dumping. Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600')
-rw-r--r--src/gallium/drivers/r600/r600_hw_context.c3
-rw-r--r--src/gallium/drivers/r600/r600_pipe.h10
2 files changed, 7 insertions, 6 deletions
diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
index ccfa8f5c306..430ffb34550 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -357,7 +357,8 @@ void r600_begin_new_cs(struct r600_context *ctx)
ctx->last_primitive_type = -1;
ctx->last_start_instance = -1;
- ctx->b.initial_gfx_cs_size = ctx->b.gfx.cs->cdw;
+ assert(!ctx->b.gfx.cs->prev_dw);
+ ctx->b.initial_gfx_cs_size = ctx->b.gfx.cs->current.cdw;
}
/* The max number of bytes to copy per packet. */
diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index cdb8e8211b9..76178c22509 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -518,9 +518,9 @@ struct r600_context {
static inline void r600_emit_command_buffer(struct radeon_winsys_cs *cs,
struct r600_command_buffer *cb)
{
- assert(cs->cdw + cb->num_dw <= cs->max_dw);
- memcpy(cs->buf + cs->cdw, cb->buf, 4 * cb->num_dw);
- cs->cdw += cb->num_dw;
+ assert(cs->current.cdw + cb->num_dw <= cs->current.max_dw);
+ memcpy(cs->current.buf + cs->current.cdw, cb->buf, 4 * cb->num_dw);
+ cs->current.cdw += cb->num_dw;
}
static inline void r600_set_atom_dirty(struct r600_context *rctx,
@@ -874,13 +874,13 @@ static inline void radeon_compute_set_context_reg_seq(struct radeon_winsys_cs *c
{
radeon_set_context_reg_seq(cs, reg, num);
/* Set the compute bit on the packet header */
- cs->buf[cs->cdw - 2] |= RADEON_CP_PACKET3_COMPUTE_MODE;
+ cs->current.buf[cs->current.cdw - 2] |= RADEON_CP_PACKET3_COMPUTE_MODE;
}
static inline void radeon_set_ctl_const_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
{
assert(reg >= R600_CTL_CONST_OFFSET);
- assert(cs->cdw+2+num <= cs->max_dw);
+ assert(cs->current.cdw + 2 + num <= cs->current.max_dw);
radeon_emit(cs, PKT3(PKT3_SET_CTL_CONST, num, 0));
radeon_emit(cs, (reg - R600_CTL_CONST_OFFSET) >> 2);
}