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authorDave Airlie <[email protected]>2010-09-10 11:22:41 +1000
committerDave Airlie <[email protected]>2010-09-10 11:29:23 +1000
commite795ca8f3175fa6fd97b6b2ef2775e3f8803012a (patch)
tree75bd873a87672c530323103e370920b44e7d777b /src/gallium/drivers/r600
parent48fda8c446c127298e8a523a321d4da131c2834d (diff)
r600g: don't need 3 bos here.
the code should reloc correctly a single BO 3 times.
Diffstat (limited to 'src/gallium/drivers/r600')
-rw-r--r--src/gallium/drivers/r600/r600_hw_states.c8
1 files changed, 2 insertions, 6 deletions
diff --git a/src/gallium/drivers/r600/r600_hw_states.c b/src/gallium/drivers/r600/r600_hw_states.c
index 55723360bf6..4de3eae065f 100644
--- a/src/gallium/drivers/r600/r600_hw_states.c
+++ b/src/gallium/drivers/r600/r600_hw_states.c
@@ -120,12 +120,8 @@ static void r600_cb(struct r600_context *rctx, struct radeon_state *rstate,
rtex = (struct r600_resource_texture*)state->cbufs[cb]->texture;
rbuffer = &rtex->resource;
rstate->bo[0] = radeon_bo_incref(rscreen->rw, rbuffer->bo);
- rstate->bo[1] = radeon_bo_incref(rscreen->rw, rbuffer->bo);
- rstate->bo[2] = radeon_bo_incref(rscreen->rw, rbuffer->bo);
- rstate->placement[0] = RADEON_GEM_DOMAIN_GTT;
- rstate->placement[2] = RADEON_GEM_DOMAIN_GTT;
- rstate->placement[4] = RADEON_GEM_DOMAIN_GTT;
- rstate->nbo = 3;
+ rstate->placement[0] = RADEON_GEM_DOMAIN_VRAM;
+ rstate->nbo = 1;
pitch = (rtex->pitch[level] / rtex->bpt) / 8 - 1;
slice = (rtex->pitch[level] / rtex->bpt) * state->cbufs[cb]->height / 64 - 1;