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authorDave Airlie <[email protected]>2011-04-24 08:33:19 +1000
committerDave Airlie <[email protected]>2011-04-24 08:33:19 +1000
commit77dc4c154cc6a8c3bc2369112c46f0be6ac444ae (patch)
treeec01a0f1988f7c722d395854ffa35a58a20c22e4 /src/gallium/drivers/r600
parent22d5a71e4dedfc047e1a14082b7d0d287cfe910e (diff)
r600g: fix bank swizzle calcs for scalar only operations.
In the initial code if we had nothing in the vector slots r would never get reset to 0, so we'd fail to compile shaders, after the previous commit this would happen for the LIT tests. When I fixed that we did a lot of unnecessary loops through all the vector states when we had no vector slots filled. So this patch optimises thing for the scalar only state. This fixes the 3 LIT piglit tests on r600g. Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600')
-rw-r--r--src/gallium/drivers/r600/r600_asm.c40
1 files changed, 25 insertions, 15 deletions
diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c
index 4cdd1ed698f..efb22fdb8ee 100644
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src/gallium/drivers/r600/r600_asm.c
@@ -725,13 +725,15 @@ static int check_and_set_bank_swizzle(struct r600_bc *bc,
struct alu_bank_swizzle bs;
int bank_swizzle[5];
int i, r = 0, forced = 0;
-
- for (i = 0; i < 5; i++)
+ boolean scalar_only = true;
+ for (i = 0; i < 5; i++) {
if (slots[i] && slots[i]->bank_swizzle_force) {
slots[i]->bank_swizzle = slots[i]->bank_swizzle_force;
forced = 1;
}
-
+ if (i < 4 && slots[i])
+ scalar_only = false;
+ }
if (forced)
return 0;
@@ -742,13 +744,17 @@ static int check_and_set_bank_swizzle(struct r600_bc *bc,
bank_swizzle[4] = SQ_ALU_SCL_210;
while(bank_swizzle[4] <= SQ_ALU_SCL_221) {
init_bank_swizzle(&bs);
- for (i = 0; i < 4; i++) {
- if (slots[i]) {
- r = check_vector(bc, slots[i], &bs, bank_swizzle[i]);
- if (r)
- break;
+ if (scalar_only == false) {
+ for (i = 0; i < 4; i++) {
+ if (slots[i]) {
+ r = check_vector(bc, slots[i], &bs, bank_swizzle[i]);
+ if (r)
+ break;
+ }
}
- }
+ } else
+ r = 0;
+
if (!r && slots[4]) {
r = check_scalar(bc, slots[4], &bs, bank_swizzle[4]);
}
@@ -760,12 +766,16 @@ static int check_and_set_bank_swizzle(struct r600_bc *bc,
return 0;
}
- for (i = 0; i < 5; i++) {
- bank_swizzle[i]++;
- if (bank_swizzle[i] <= SQ_ALU_VEC_210)
- break;
- else
- bank_swizzle[i] = SQ_ALU_VEC_012;
+ if (scalar_only) {
+ bank_swizzle[4]++;
+ } else {
+ for (i = 0; i < 5; i++) {
+ bank_swizzle[i]++;
+ if (bank_swizzle[i] <= SQ_ALU_VEC_210)
+ break;
+ else
+ bank_swizzle[i] = SQ_ALU_VEC_012;
+ }
}
}