r600g: put the rest of CS overflow checks in r600_need_cs_space

3 files changed, 9 insertions, 18 deletions

diff --git a/src/gallium/drivers/r600/evergreen_hw_context.c b/src/gallium/drivers/r600/evergreen_hw_context.c
index 3af5bfacd83..5eb6332afba 100644
--- a/src/gallium/drivers/r600/evergreen_hw_context.c
+++ b/src/gallium/drivers/r600/evergreen_hw_context.c
@@ -999,12 +999,9 @@ int evergreen_context_init(struct r600_context *ctx, struct r600_screen *screen)
 		r = -ENOMEM;
 		goto out_err;
 	}
-	ctx->pm4_ndwords = RADEON_MAX_CMDBUF_DWORDS;
 	ctx->pm4 = ctx->cs->buf;
 
 	r600_init_cs(ctx);
-	/* save 16dwords space for fence mecanism */
-	ctx->pm4_ndwords -= 16;
 	ctx->max_db = 8;
 	return 0;
 out_err:
@@ -1158,14 +1155,10 @@ void evergreen_context_draw(struct r600_context *ctx, const struct r600_draw *dr
 				S_02800C_NOOP_CULL_DISABLE(1));
 	}
 
-	/* update the max dword count to make sure we have enough space
-	 * reserved for flushing the destination caches */
-	ctx->pm4_ndwords = RADEON_MAX_CMDBUF_DWORDS - ctx->num_dest_buffers * 7 - 16;
-
 	r600_need_cs_space(ctx, 0, TRUE);
 
 	/* at this point everything is flushed and ctx->pm4_cdwords = 0 */
-	if (unlikely((ctx->pm4_dirty_cdwords + ndwords) > ctx->pm4_ndwords)) {
+	if (unlikely((ctx->pm4_dirty_cdwords + ndwords) > RADEON_MAX_CMDBUF_DWORDS)) {
 		R600_ERR("context is too big to be scheduled\n");
 		return;
 	}
diff --git a/src/gallium/drivers/r600/r600.h b/src/gallium/drivers/r600/r600.h
index f41828b5ab3..5bd808ace4d 100644
--- a/src/gallium/drivers/r600/r600.h
+++ b/src/gallium/drivers/r600/r600.h
@@ -199,7 +199,6 @@ struct r600_context {
 	struct list_head	dirty;
 	struct list_head	resource_dirty;
 	struct list_head	enable_list;
-	unsigned		pm4_ndwords;
 	unsigned		pm4_dirty_cdwords;
 	unsigned		ctx_pm4_ndwords;
 	unsigned		init_dwords;
diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
index 7a848629180..eb80fa94503 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -916,12 +916,9 @@ int r600_context_init(struct r600_context *ctx, struct r600_screen *screen)
 		r = -ENOMEM;
 		goto out_err;
 	}
-	ctx->pm4_ndwords = RADEON_MAX_CMDBUF_DWORDS;
 	ctx->pm4 = ctx->cs->buf;
 
 	r600_init_cs(ctx);
-	/* save 16dwords space for fence mecanism */
-	ctx->pm4_ndwords -= 16;
 	ctx->max_db = 4;
 	return 0;
 out_err:
@@ -951,8 +948,14 @@ void r600_need_cs_space(struct r600_context *ctx, unsigned num_dw,
 		num_dw += 3;
 	}
 
+	/* Count in framebuffer cache flushes at the end of CS. */
+	num_dw += ctx->num_dest_buffers * 7;
+
+	/* Save 16 dwords for the fence mechanism. */
+	num_dw += 16;
+
 	/* Flush if there's not enough space. */
-	if (num_dw > ctx->pm4_ndwords) {
+	if (num_dw > RADEON_MAX_CMDBUF_DWORDS) {
 		r600_context_flush(ctx, RADEON_FLUSH_ASYNC);
 	}
 }
@@ -1456,14 +1459,10 @@ void r600_context_draw(struct r600_context *ctx, const struct r600_draw *draw)
 				S_028D10_NOOP_CULL_DISABLE(1));
 	}
 
-	/* update the max dword count to make sure we have enough space
-	 * reserved for flushing the destination caches */
-	ctx->pm4_ndwords = RADEON_MAX_CMDBUF_DWORDS - ctx->num_dest_buffers * 7 - 16;
-
 	r600_need_cs_space(ctx, 0, TRUE);
 
 	/* at this point everything is flushed and ctx->pm4_cdwords = 0 */
-	if (unlikely((ctx->pm4_dirty_cdwords + ndwords) > ctx->pm4_ndwords)) {
+	if (unlikely((ctx->pm4_dirty_cdwords + ndwords) > RADEON_MAX_CMDBUF_DWORDS)) {
 		R600_ERR("context is too big to be scheduled\n");
 		return;
 	}