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authorDave Airlie <[email protected]>2011-06-08 14:35:00 +1000
committerDave Airlie <[email protected]>2011-06-09 11:25:02 +1000
commit04554c7d3a3b28e8103e50ed54f1ac57c6c11017 (patch)
tree83165b67573bfd9cb778db08fdbb2f1622097322 /src/gallium/drivers/r600
parentd56fe67c6255b1ace84c025c83439ab8cb3f91fe (diff)
r600g: adjust vs/ps gprs on r600/r700 cards when needed.
Ideally we'd have a compiler and register spilling and all that but this is good enough for now to avoid the gpu hang in piglit, glsl-vs-vec4-indexing-temp-dst-in-nested-loop-combined on r600/r700 cards. based on r600c patch Andre Maasikas <[email protected]> r600c: bump sq gpr resources if a shader needs more than default Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600')
-rw-r--r--src/gallium/drivers/r600/r600_pipe.h2
-rw-r--r--src/gallium/drivers/r600/r600_state.c43
-rw-r--r--src/gallium/drivers/r600/r600_state_common.c8
3 files changed, 51 insertions, 2 deletions
diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index d92b74ebc4e..332f932013a 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -205,6 +205,7 @@ struct r600_pipe_context {
struct util_slab_mempool pool_transfers;
boolean blit;
+ unsigned default_ps_gprs, default_vs_gprs;
};
struct r600_drawl {
@@ -270,6 +271,7 @@ void r600_pipe_init_buffer_resource(struct r600_pipe_context *rctx,
void r600_pipe_mod_buffer_resource(struct r600_pipe_resource_state *rstate,
struct r600_resource *rbuffer,
unsigned offset, unsigned stride);
+void r600_adjust_gprs(struct r600_pipe_context *rctx);
/* r600_texture.c */
void r600_init_screen_texture_functions(struct pipe_screen *screen);
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 3851042965c..5a1c456309b 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -1025,6 +1025,46 @@ void r600_init_state_functions(struct r600_pipe_context *rctx)
rctx->context.texture_barrier = r600_texture_barrier;
}
+void r600_adjust_gprs(struct r600_pipe_context *rctx)
+{
+ enum radeon_family family;
+ struct r600_pipe_state rstate;
+ unsigned num_ps_gprs = rctx->default_ps_gprs;
+ unsigned num_vs_gprs = rctx->default_vs_gprs;
+ unsigned tmp;
+ int diff;
+
+ family = r600_get_family(rctx->radeon);
+
+ if (family >= CHIP_CEDAR)
+ return;
+
+ if (!rctx->ps_shader && !rctx->vs_shader)
+ return;
+
+ if (rctx->ps_shader->shader.bc.ngpr > rctx->default_ps_gprs)
+ {
+ diff = rctx->ps_shader->shader.bc.ngpr - rctx->default_ps_gprs;
+ num_vs_gprs -= diff;
+ num_ps_gprs += diff;
+ }
+
+ if (rctx->vs_shader->shader.bc.ngpr > rctx->default_vs_gprs)
+ {
+ diff = rctx->vs_shader->shader.bc.ngpr - rctx->default_vs_gprs;
+ num_ps_gprs -= diff;
+ num_vs_gprs += diff;
+ }
+
+ tmp = 0;
+ tmp |= S_008C04_NUM_PS_GPRS(num_ps_gprs);
+ tmp |= S_008C04_NUM_VS_GPRS(num_vs_gprs);
+ rstate.nregs = 0;
+ r600_pipe_state_add_reg(&rstate, R_008C04_SQ_GPR_RESOURCE_MGMT_1, tmp, 0x0FFFFFFF, NULL);
+
+ r600_context_pipe_state_set(&rctx->ctx, &rstate);
+}
+
void r600_init_config(struct r600_pipe_context *rctx)
{
int ps_prio;
@@ -1167,6 +1207,9 @@ void r600_init_config(struct r600_pipe_context *rctx)
break;
}
+ rctx->default_ps_gprs = num_ps_gprs;
+ rctx->default_vs_gprs = num_vs_gprs;
+
rstate->id = R600_PIPE_STATE_CONFIG;
/* SQ_CONFIG */
diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index a670ac02be2..1eb9389bade 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -273,8 +273,10 @@ void r600_bind_ps_shader(struct pipe_context *ctx, void *state)
if (state) {
r600_context_pipe_state_set(&rctx->ctx, &rctx->ps_shader->rstate);
}
- if (rctx->ps_shader && rctx->vs_shader)
+ if (rctx->ps_shader && rctx->vs_shader) {
r600_spi_update(rctx);
+ r600_adjust_gprs(rctx);
+ }
}
void r600_bind_vs_shader(struct pipe_context *ctx, void *state)
@@ -286,8 +288,10 @@ void r600_bind_vs_shader(struct pipe_context *ctx, void *state)
if (state) {
r600_context_pipe_state_set(&rctx->ctx, &rctx->vs_shader->rstate);
}
- if (rctx->ps_shader && rctx->vs_shader)
+ if (rctx->ps_shader && rctx->vs_shader) {
r600_spi_update(rctx);
+ r600_adjust_gprs(rctx);
+ }
}
void r600_delete_ps_shader(struct pipe_context *ctx, void *state)