r600g: set round_mode to truncate and get rid of tgsi_f2i on evergreen

Signed-off-by: Vadim Girlin <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>

3 files changed, 50 insertions, 56 deletions

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index a713e243b1f..4a3e2f39e92 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -2418,7 +2418,8 @@ void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader
 				0xFFFFFFFF, NULL, 0);
 	r600_pipe_state_add_reg(rstate,
 				R_028848_SQ_PGM_RESOURCES_2_PS,
-				0x0, 0xFFFFFFFF, NULL, 0);
+				S_028848_SINGLE_ROUND(V_SQ_ROUND_TO_ZERO),
+				0xFFFFFFFF, NULL, 0);
 	r600_pipe_state_add_reg(rstate,
 				R_02884C_SQ_PGM_EXPORTS_PS,
 				exports_ps, 0xFFFFFFFF, NULL, 0);
@@ -2480,7 +2481,8 @@ void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader
 			0xFFFFFFFF, NULL, 0);
 	r600_pipe_state_add_reg(rstate,
 				R_028864_SQ_PGM_RESOURCES_2_VS,
-				0x0, 0xFFFFFFFF, NULL, 0);
+				S_028864_SINGLE_ROUND(V_SQ_ROUND_TO_ZERO),
+				0xFFFFFFFF, NULL, 0);
 	r600_pipe_state_add_reg(rstate,
 			R_02885C_SQ_PGM_START_VS,
 			r600_resource_va(ctx->screen, (void *)shader->bo) >> 8,
diff --git a/src/gallium/drivers/r600/evergreend.h b/src/gallium/drivers/r600/evergreend.h
index fa3feceb3cc..280e30bef34 100644
--- a/src/gallium/drivers/r600/evergreend.h
+++ b/src/gallium/drivers/r600/evergreend.h
@@ -1365,7 +1365,30 @@
 #define   S_028860_UNCACHED_FIRST_INST(x)              (((x) & 0x1) << 28)
 #define   G_028860_UNCACHED_FIRST_INST(x)              (((x) >> 28) & 0x1)
 #define   C_028860_UNCACHED_FIRST_INST                 0xEFFFFFFF
+
 #define R_028864_SQ_PGM_RESOURCES_2_VS               0x028864
+#define   S_028864_SINGLE_ROUND(x)                     (((x) & 0x3) << 0)
+#define   G_028864_SINGLE_ROUND(x)                     (((x) >> 0) & 0x3)
+#define   C_028864_SINGLE_ROUND                        0xFFFFFFFC
+#define     V_SQ_ROUND_NEAREST_EVEN                    0x00
+#define     V_SQ_ROUND_PLUS_INFINITY                   0x01
+#define     V_SQ_ROUND_MINUS_INFINITY                  0x02
+#define     V_SQ_ROUND_TO_ZERO                         0x03
+#define   S_028864_DOUBLE_ROUND(x)                     (((x) & 0x3) << 2)
+#define   G_028864_DOUBLE_ROUND(x)                     (((x) >> 2) & 0x3)
+#define   C_028864_DOUBLE_ROUND                        0xFFFFFFF3
+#define   S_028864_ALLOW_SINGLE_DENORM_IN(x)           (((x) & 0x1) << 4)
+#define   G_028864_ALLOW_SINGLE_DENORM_IN(x)           (((x) >> 4) & 0x1)
+#define   C_028864_ALLOW_SINGLE_DENORM_IN              0xFFFFFFEF
+#define   S_028864_ALLOW_SINGLE_DENORM_OUT(x)          (((x) & 0x1) << 5)
+#define   G_028864_ALLOW_SINGLE_DENORM_OUT(x)          (((x) >> 5) & 0x1)
+#define   C_028864_ALLOW_SINGLE_DENORM_OUT             0xFFFFFFDF
+#define   S_028864_ALLOW_DOUBLE_DENORM_IN(x)           (((x) & 0x1) << 6)
+#define   G_028864_ALLOW_DOUBLE_DENORM_IN(x)           (((x) >> 6) & 0x1)
+#define   C_028864_ALLOW_DOUBLE_DENORM_IN              0xFFFFFFBF
+#define   S_028864_ALLOW_DOUBLE_DENORM_OUT(x)          (((x) & 0x1) << 7)
+#define   G_028864_ALLOW_DOUBLE_DENORM_OUT(x)          (((x) >> 7) & 0x1)
+#define   C_028864_ALLOW_DOUBLE_DENORM_OUT             0xFFFFFF7F
 
 #define R_028844_SQ_PGM_RESOURCES_PS                 0x028844
 #define   S_028844_NUM_GPRS(x)                         (((x) & 0xFF) << 0)
@@ -1379,14 +1402,33 @@
 #define   C_028844_DX10_CLAMP                          0xFFDFFFFF
 #define   S_028844_PRIME_CACHE_ON_DRAW(x)              (((x) & 0x1) << 23)
 #define   G_028844_PRIME_CACHE_ON_DRAW(x)              (((x) >> 23) & 0x1)
-
+#define   C_028844_PRIME_CACHE_ON_DRAW                 0xFF7FFFFF
 #define   S_028844_UNCACHED_FIRST_INST(x)              (((x) & 0x1) << 28)
 #define   G_028844_UNCACHED_FIRST_INST(x)              (((x) >> 28) & 0x1)
 #define   C_028844_UNCACHED_FIRST_INST                 0xEFFFFFFF
 #define   S_028844_CLAMP_CONSTS(x)                     (((x) & 0x1) << 31)
 #define   G_028844_CLAMP_CONSTS(x)                     (((x) >> 31) & 0x1)
 #define   C_028844_CLAMP_CONSTS                        0x7FFFFFFF
-#define R_028848_SQ_PGM_RESOURCES_2_PS                 0x028848
+
+#define R_028848_SQ_PGM_RESOURCES_2_PS               0x028848
+#define   S_028848_SINGLE_ROUND(x)                     (((x) & 0x3) << 0)
+#define   G_028848_SINGLE_ROUND(x)                     (((x) >> 0) & 0x3)
+#define   C_028848_SINGLE_ROUND                        0xFFFFFFFC
+#define   S_028848_DOUBLE_ROUND(x)                     (((x) & 0x3) << 2)
+#define   G_028848_DOUBLE_ROUND(x)                     (((x) >> 2) & 0x3)
+#define   C_028848_DOUBLE_ROUND                        0xFFFFFFF3
+#define   S_028848_ALLOW_SINGLE_DENORM_IN(x)           (((x) & 0x1) << 4)
+#define   G_028848_ALLOW_SINGLE_DENORM_IN(x)           (((x) >> 4) & 0x1)
+#define   C_028848_ALLOW_SINGLE_DENORM_IN              0xFFFFFFEF
+#define   S_028848_ALLOW_SINGLE_DENORM_OUT(x)          (((x) & 0x1) << 5)
+#define   G_028848_ALLOW_SINGLE_DENORM_OUT(x)          (((x) >> 5) & 0x1)
+#define   C_028848_ALLOW_SINGLE_DENORM_OUT             0xFFFFFFDF
+#define   S_028848_ALLOW_DOUBLE_DENORM_IN(x)           (((x) & 0x1) << 6)
+#define   G_028848_ALLOW_DOUBLE_DENORM_IN(x)           (((x) >> 6) & 0x1)
+#define   C_028848_ALLOW_DOUBLE_DENORM_IN              0xFFFFFFBF
+#define   S_028848_ALLOW_DOUBLE_DENORM_OUT(x)          (((x) & 0x1) << 7)
+#define   G_028848_ALLOW_DOUBLE_DENORM_OUT(x)          (((x) >> 7) & 0x1)
+#define   C_028848_ALLOW_DOUBLE_DENORM_OUT             0xFFFFFF7F
 
 #define R_028644_SPI_PS_INPUT_CNTL_0                 0x028644
 #define   S_028644_SEMANTIC(x)                         (((x) & 0xFF) << 0)
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index db26faad270..5609ef153e6 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -2738,56 +2738,6 @@ static int tgsi_imod(struct r600_shader_ctx *ctx)
 	return tgsi_divmod(ctx, 1, 1);
 }
 
-
-static int tgsi_f2i(struct r600_shader_ctx *ctx)
-{
-	struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
-	struct r600_bytecode_alu alu;
-	int i, r;
-	unsigned write_mask = inst->Dst[0].Register.WriteMask;
-	int last_inst = tgsi_last_instruction(write_mask);
-
-	for (i = 0; i < 4; i++) {
-		if (!(write_mask & (1<<i)))
-			continue;
-
-		memset(&alu, 0, sizeof(struct r600_bytecode_alu));
-		alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC);
-
-		alu.dst.sel = ctx->temp_reg;
-		alu.dst.chan = i;
-		alu.dst.write = 1;
-
-		r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
-		if (i == last_inst)
-			alu.last = 1;
-		r = r600_bytecode_add_alu(ctx->bc, &alu);
-		if (r)
-			return r;
-	}
-
-	for (i = 0; i < 4; i++) {
-		if (!(write_mask & (1<<i)))
-			continue;
-
-		memset(&alu, 0, sizeof(struct r600_bytecode_alu));
-		alu.inst = ctx->inst_info->r600_opcode;
-
-		tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
-
-		alu.src[0].sel = ctx->temp_reg;
-		alu.src[0].chan = i;
-
-		if (i == last_inst)
-			alu.last = 1;
-		r = r600_bytecode_add_alu(ctx->bc, &alu);
-		if (r)
-			return r;
-	}
-
-	return 0;
-}
-
 static int tgsi_iabs(struct r600_shader_ctx *ctx)
 {
 	struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
@@ -4831,7 +4781,7 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = {
 	{TGSI_OPCODE_END,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_end},  /* aka HALT */
 	/* gap */
 	{118,			0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
-	{TGSI_OPCODE_F2I,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT, tgsi_f2i},
+	{TGSI_OPCODE_F2I,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT, tgsi_op2},
 	{TGSI_OPCODE_IDIV,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_idiv},
 	{TGSI_OPCODE_IMAX,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_INT, tgsi_op2},
 	{TGSI_OPCODE_IMIN,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_INT, tgsi_op2},
@@ -4839,7 +4789,7 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = {
 	{TGSI_OPCODE_ISGE,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT, tgsi_op2},
 	{TGSI_OPCODE_ISHR,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT, tgsi_op2},
 	{TGSI_OPCODE_ISLT,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT, tgsi_op2_swap},
-	{TGSI_OPCODE_F2U,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT, tgsi_f2i},
+	{TGSI_OPCODE_F2U,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT, tgsi_op2_trans},
 	{TGSI_OPCODE_U2F,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT, tgsi_op2_trans},
 	{TGSI_OPCODE_UADD,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT, tgsi_op2},
 	{TGSI_OPCODE_UDIV,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_udiv},