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authorDave Airlie <[email protected]>2018-02-05 16:04:18 +1000
committerDave Airlie <[email protected]>2018-02-07 06:08:11 +1000
commit8bdad9fa1faf3fa258a7731605e8b2bf218a33bd (patch)
tree8ac2921ead636c14b8b077926ce0fde6e2abf013 /src/gallium/drivers/r600/sb
parent012100b80936325945f24a580f643e535028fe19 (diff)
r600/sb/cayman: fix indirect ubo access on cayman
With sb enabled on cayman, this was overwriting the proper cf index value with random ones if the dst gpr was 2 or 3, only save the value for a MOVA instruction. Fixes: KHR-GL45.gpu_shader5.uniform_blocks_array_indexing (on cayman with sb) Cc: <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/sb')
-rw-r--r--src/gallium/drivers/r600/sb/sb_bc_parser.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/r600/sb/sb_bc_parser.cpp b/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
index 970e4141d54..87035ee2a6b 100644
--- a/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
+++ b/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
@@ -567,7 +567,7 @@ int bc_parser::prepare_alu_group(cf_node* cf, alu_group_node *g) {
n->src.push_back(get_cf_index_value(1));
}
- if ((n->bc.dst_gpr == CM_V_SQ_MOVA_DST_CF_IDX0 || n->bc.dst_gpr == CM_V_SQ_MOVA_DST_CF_IDX1) &&
+ if ((flags & AF_MOVA) && (n->bc.dst_gpr == CM_V_SQ_MOVA_DST_CF_IDX0 || n->bc.dst_gpr == CM_V_SQ_MOVA_DST_CF_IDX1) &&
ctx.is_cayman())
// Move CF_IDX value into tex instruction operands, scheduler will later re-emit setting of CF_IDX
save_set_cf_index(n->src[0], n->bc.dst_gpr == CM_V_SQ_MOVA_DST_CF_IDX1);