diff options
| author | Dave Airlie <[email protected]> | 2010-09-01 14:56:04 +1000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2010-09-01 14:56:04 +1000 |
| commit | 1fa7245c348cb7aced81f1672140f64cb6450e2f (patch) | |
| tree | b053fbdcd99b786eebcfe40f0f3e22d62c403c56 /src/gallium/drivers/r600/radeon.h | |
| parent | d7e2509692d3aa8afb8d2236a4f28b6ab502ec62 (diff) | |
Revert "r600g: precompute some of the hw state"
This reverts commit de0b76cab22caa9fc7260f80acb8f151ccced6c5, its pre-computes the texture state wrong,
you can't just use an array of levels, since you can have FBOs to depth texture slices inside a level as well
it would get really messy quickly. Probably need to split commits like this up into pieces for each piece
of state, so we can revert bits easier in case of regressions.
This also break 5 piglit tests, and valgrind starts to warn about invalid read/writes after this.
Diffstat (limited to 'src/gallium/drivers/r600/radeon.h')
| -rw-r--r-- | src/gallium/drivers/r600/radeon.h | 47 |
1 files changed, 14 insertions, 33 deletions
diff --git a/src/gallium/drivers/r600/radeon.h b/src/gallium/drivers/r600/radeon.h index 3f1ca95f699..046c264c044 100644 --- a/src/gallium/drivers/r600/radeon.h +++ b/src/gallium/drivers/r600/radeon.h @@ -109,11 +109,13 @@ struct radeon_state { unsigned id; unsigned shader_index; unsigned nstates; - u32 states[64]; + u32 *states; unsigned npm4; unsigned cpm4; u32 pm4_crc; - u32 pm4[128]; + u32 *pm4; + u32 nimmd; + u32 *immd; unsigned nbo; struct radeon_bo *bo[4]; unsigned nreloc; @@ -128,7 +130,6 @@ struct radeon_state *radeon_state_shader(struct radeon *radeon, u32 type, u32 id struct radeon_state *radeon_state_incref(struct radeon_state *state); struct radeon_state *radeon_state_decref(struct radeon_state *state); int radeon_state_pm4(struct radeon_state *state); -int radeon_state_convert(struct radeon_state *state, u32 stype, u32 id, u32 shader_type); /* * draw functions @@ -218,7 +219,7 @@ enum r600_stype { R600_STATE_DB, R600_STATE_QUERY_BEGIN, R600_STATE_QUERY_END, - R600_STATE_UCP, + R600_STATE_CLIP, R600_STATE_VGT, R600_STATE_DRAW, }; @@ -612,37 +613,17 @@ enum { /* R600_DRAW */ #define R600_DRAW__VGT_NUM_INDICES 0 #define R600_DRAW__VGT_DMA_BASE_HI 1 -#define R600_DRAW__VGT_DMA_BASE 2 +#define R600_DRAW__VGT_DMA_BASE 2 #define R600_DRAW__VGT_DRAW_INITIATOR 3 -#define R600_DRAW_SIZE 4 -#define R600_DRAW_PM4 128 +#define R600_DRAW_SIZE 4 +#define R600_DRAW_PM4 128 /* R600_CLIP */ -#define R600_CLIP__PA_CL_UCP_X_0 0 -#define R600_CLIP__PA_CL_UCP_Y_0 1 -#define R600_CLIP__PA_CL_UCP_Z_0 2 -#define R600_CLIP__PA_CL_UCP_W_0 3 -#define R600_CLIP__PA_CL_UCP_X_1 4 -#define R600_CLIP__PA_CL_UCP_Y_1 5 -#define R600_CLIP__PA_CL_UCP_Z_1 6 -#define R600_CLIP__PA_CL_UCP_W_1 7 -#define R600_CLIP__PA_CL_UCP_X_2 8 -#define R600_CLIP__PA_CL_UCP_Y_2 9 -#define R600_CLIP__PA_CL_UCP_Z_2 10 -#define R600_CLIP__PA_CL_UCP_W_2 11 -#define R600_CLIP__PA_CL_UCP_X_3 12 -#define R600_CLIP__PA_CL_UCP_Y_3 13 -#define R600_CLIP__PA_CL_UCP_Z_3 14 -#define R600_CLIP__PA_CL_UCP_W_3 15 -#define R600_CLIP__PA_CL_UCP_X_4 16 -#define R600_CLIP__PA_CL_UCP_Y_4 17 -#define R600_CLIP__PA_CL_UCP_Z_4 18 -#define R600_CLIP__PA_CL_UCP_W_4 19 -#define R600_CLIP__PA_CL_UCP_X_5 20 -#define R600_CLIP__PA_CL_UCP_Y_5 21 -#define R600_CLIP__PA_CL_UCP_Z_5 22 -#define R600_CLIP__PA_CL_UCP_W_5 23 -#define R600_CLIP_SIZE 24 -#define R600_CLIP_PM4 128 +#define R600_CLIP__PA_CL_UCP_X_0 0 +#define R600_CLIP__PA_CL_UCP_Y_0 1 +#define R600_CLIP__PA_CL_UCP_Z_0 2 +#define R600_CLIP__PA_CL_UCP_W_0 3 +#define R600_CLIP_SIZE 4 +#define R600_CLIP_PM4 128 /* R600 QUERY BEGIN/END */ #define R600_QUERY__OFFSET 0 #define R600_QUERY_SIZE 1 |