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authorXavier Bouchoux <[email protected]>2015-01-28 02:20:51 +0100
committerMarek Olšák <[email protected]>2015-02-06 20:03:06 +0100
commitacef65503e79ce61a16bdba92462f0ed8a7b52c2 (patch)
tree48227e0910ab48a75bc368d3651d7ea5f53d9847 /src/gallium/drivers/r600/r700_asm.c
parentbae23a1756c361dd74b97be6c9d4762bca4ca81a (diff)
r600g: fix abs() support on ALU 3 source operands instructions
Since alu does not support abs() modifier on source operands, spill and apply the modifiers to a temp register when needed. Signed-off-by: Xavier Bouchoux <[email protected]> Reviewed-by: Glenn Kennard <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/r700_asm.c')
-rw-r--r--src/gallium/drivers/r600/r700_asm.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/gallium/drivers/r600/r700_asm.c b/src/gallium/drivers/r600/r700_asm.c
index 4a9fa3612e1..04f8c6288f0 100644
--- a/src/gallium/drivers/r600/r700_asm.c
+++ b/src/gallium/drivers/r600/r700_asm.c
@@ -48,6 +48,7 @@ int r700_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecode_alu *
/* don't replace gpr by pv or ps for destination register */
if (alu->is_op3) {
+ assert(!alu->src[0].abs && !alu->src[1].abs && !alu->src[2].abs);
bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) |
S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) |
S_SQ_ALU_WORD1_DST_REL(alu->dst.rel) |