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authorChristian König <[email protected]>2013-07-10 15:43:16 +0200
committerChristian König <[email protected]>2013-07-12 10:52:27 +0200
commit1681bd7f2b392d0b379cb0ff43a4fac33da74762 (patch)
treecba7acfdf027fc46d916b66bb541e168531c99b0 /src/gallium/drivers/r600/r600_uvd.c
parent649ef4da30e23f077087326a6a9116759f1d9dd3 (diff)
radeon/uvd: fall back to shader based decoding for MPEG2 on UVD 2.x v2
UVD 2.x doesn't support hardware decoding of MPEG2, just use shader based decoding for those chipsets. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=66450 v2: fix interlacing as well Signed-off-by: Christian König <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/r600_uvd.c')
-rw-r--r--src/gallium/drivers/r600/r600_uvd.c19
1 files changed, 15 insertions, 4 deletions
diff --git a/src/gallium/drivers/r600/r600_uvd.c b/src/gallium/drivers/r600/r600_uvd.c
index a077a50d190..3b4aa843808 100644
--- a/src/gallium/drivers/r600/r600_uvd.c
+++ b/src/gallium/drivers/r600/r600_uvd.c
@@ -184,10 +184,21 @@ int r600_uvd_get_video_param(struct pipe_screen *screen,
{
struct r600_screen *rscreen = (struct r600_screen *)screen;
- /* No support for MPEG4 on UVD 2.x */
- if (param == PIPE_VIDEO_CAP_SUPPORTED && rscreen->family < CHIP_PALM &&
- u_reduce_video_profile(profile) == PIPE_VIDEO_CODEC_MPEG4)
- return false;
+ /* UVD 2.x limits */
+ if (rscreen->family < CHIP_PALM) {
+ enum pipe_video_codec codec = u_reduce_video_profile(profile);
+ switch (param) {
+ case PIPE_VIDEO_CAP_SUPPORTED:
+ /* no support for MPEG4 */
+ return codec != PIPE_VIDEO_CODEC_MPEG4;
+ case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
+ case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
+ /* and MPEG2 only with shaders */
+ return codec != PIPE_VIDEO_CODEC_MPEG12;
+ default:
+ break;
+ }
+ }
return ruvd_get_video_param(screen, profile, param);
}