diff options
author | Dave Airlie <[email protected]> | 2011-02-14 13:34:11 +1000 |
---|---|---|
committer | Dave Airlie <[email protected]> | 2011-02-15 14:44:08 +1000 |
commit | ea7a548d07ddc69c226a425af0f88f818203d6ee (patch) | |
tree | 8670b6ef61877dcf270312e409244af90a2a0522 /src/gallium/drivers/r600/r600_texture.c | |
parent | fdb4373a2083ccd0363737fade295b0bedaf9f50 (diff) |
r600g: drop tiled flag
we can work this out from the array_mode and it makes more sense
to do that.
Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/r600_texture.c')
-rw-r--r-- | src/gallium/drivers/r600/r600_texture.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/gallium/drivers/r600/r600_texture.c b/src/gallium/drivers/r600/r600_texture.c index 793bdc4d5ec..30e31e58d31 100644 --- a/src/gallium/drivers/r600/r600_texture.c +++ b/src/gallium/drivers/r600/r600_texture.c @@ -388,8 +388,6 @@ r600_texture_create_object(struct pipe_screen *screen, if (util_format_is_depth_or_stencil(base->format) && permit_hardware_blit(screen, base)) rtex->depth = 1; - if (array_mode) - rtex->tiled = 1; r600_setup_miptree(screen, rtex, array_mode); resource->size = rtex->size; @@ -557,7 +555,7 @@ struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx, * the CPU is much happier reading out of cached system memory * than uncached VRAM. */ - if (rtex->tiled) + if (R600_TEX_IS_TILED(rtex, level)) use_staging_texture = TRUE; if ((usage & PIPE_TRANSFER_READ) && u_box_volume(box) > 1024) |