diff options
author | Marek Olšák <[email protected]> | 2012-01-29 03:28:41 +0100 |
---|---|---|
committer | Marek Olšák <[email protected]> | 2012-01-31 02:17:50 +0100 |
commit | 9c0b50ca0b31aa66147ea7919022de2633315c9a (patch) | |
tree | 73ce473a1011bc17db9237dc03c33900a4f83e39 /src/gallium/drivers/r600/r600_state.c | |
parent | 2ffa8af9db4a4a9cf4cb5bb524bd8a57c53daca0 (diff) |
r600g: don't set CB_TARGET_MASK in set_framebuffer_state
It's emitted in draw_vbo, always.
Reviewed-by: Dave Airlie <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/r600_state.c')
-rw-r--r-- | src/gallium/drivers/r600/r600_state.c | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index 9397512d042..821da0d9e27 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -1604,7 +1604,7 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx, { struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx; struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state); - u32 shader_mask, tl, br, shader_control, target_mask; + u32 shader_mask, tl, br, shader_control; if (rstate == NULL) return; @@ -1627,12 +1627,9 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx, rctx->ctx.num_dest_buffers++; } - target_mask = 0x00000000; - target_mask = 0xFFFFFFFF; shader_mask = 0; shader_control = 0; for (int i = 0; i < state->nr_cbufs; i++) { - target_mask ^= 0xf << (i * 4); shader_mask |= 0xf << (i * 4); shader_control |= 1 << i; } @@ -1674,8 +1671,6 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx, r600_pipe_state_add_reg(rstate, R_0287A0_CB_SHADER_CONTROL, shader_control, 0xFFFFFFFF, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028238_CB_TARGET_MASK, - 0x00000000, target_mask, NULL, 0); r600_pipe_state_add_reg(rstate, R_02823C_CB_SHADER_MASK, shader_mask, 0xFFFFFFFF, NULL, 0); r600_pipe_state_add_reg(rstate, R_028C04_PA_SC_AA_CONFIG, |