summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/r600/r600_shader.c
diff options
context:
space:
mode:
authorEric Anholt <[email protected]>2014-11-12 14:23:59 -0800
committerEric Anholt <[email protected]>2014-11-24 14:56:22 -0800
commit365a4a3f9a80d1b7a6d030d2921578dfc5c899c6 (patch)
tree223adbf8e987edfcedd2677fea46049cfc67e8ff /src/gallium/drivers/r600/r600_shader.c
parent00f7002c5c45887b204a3f14b8e3b32472cc39bb (diff)
gallium: Drop the unused CND opcode.
Nothing in the tree generates it. Reviewed-by: Jose Fonseca <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/r600_shader.c')
-rw-r--r--src/gallium/drivers/r600/r600_shader.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 2e74d5963d4..7a2609a2c1d 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -7207,7 +7207,7 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
{TGSI_OPCODE_MAD, 1, ALU_OP3_MULADD, tgsi_op3},
{TGSI_OPCODE_SUB, 0, ALU_OP2_ADD, tgsi_op2},
{TGSI_OPCODE_LRP, 0, ALU_OP0_NOP, tgsi_lrp},
- {TGSI_OPCODE_CND, 0, ALU_OP0_NOP, tgsi_unsupported},
+ {19, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_SQRT, 0, ALU_OP1_SQRT_IEEE, tgsi_trans_srcx_replicate},
{TGSI_OPCODE_DP2A, 0, ALU_OP0_NOP, tgsi_unsupported},
{22, 0, ALU_OP0_NOP, tgsi_unsupported},
@@ -7406,7 +7406,7 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = {
{TGSI_OPCODE_MAD, 1, ALU_OP3_MULADD, tgsi_op3},
{TGSI_OPCODE_SUB, 0, ALU_OP2_ADD, tgsi_op2},
{TGSI_OPCODE_LRP, 0, ALU_OP0_NOP, tgsi_lrp},
- {TGSI_OPCODE_CND, 0, ALU_OP0_NOP, tgsi_unsupported},
+ {19, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_SQRT, 0, ALU_OP1_SQRT_IEEE, tgsi_trans_srcx_replicate},
{TGSI_OPCODE_DP2A, 0, ALU_OP0_NOP, tgsi_unsupported},
{22, 0, ALU_OP0_NOP, tgsi_unsupported},
@@ -7605,7 +7605,7 @@ static struct r600_shader_tgsi_instruction cm_shader_tgsi_instruction[] = {
{TGSI_OPCODE_MAD, 1, ALU_OP3_MULADD, tgsi_op3},
{TGSI_OPCODE_SUB, 0, ALU_OP2_ADD, tgsi_op2},
{TGSI_OPCODE_LRP, 0, ALU_OP0_NOP, tgsi_lrp},
- {TGSI_OPCODE_CND, 0, ALU_OP0_NOP, tgsi_unsupported},
+ {19, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_SQRT, 0, ALU_OP1_SQRT_IEEE, cayman_emit_float_instr},
{TGSI_OPCODE_DP2A, 0, ALU_OP0_NOP, tgsi_unsupported},
{22, 0, ALU_OP0_NOP, tgsi_unsupported},