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authorEric Anholt <[email protected]>2014-11-12 14:36:19 -0800
committerEric Anholt <[email protected]>2014-11-24 14:56:22 -0800
commitecfe9e2ad2b5f178ef09420f8d95d49937137cd9 (patch)
treec80afbfb835dfbf16081e3bcd849a235d9a45700 /src/gallium/drivers/r600/r600_shader.c
parentdc00b382b58bb3eb94ca393d32bd7eb3bb07d021 (diff)
gallium: Drop the unused SFL/STR opcodes.
Nothing generated them. Reviewed-by: Jose Fonseca <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/r600_shader.c')
-rw-r--r--src/gallium/drivers/r600/r600_shader.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 6f967b5c53e..24fed848e94 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -7234,12 +7234,12 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
{TGSI_OPCODE_PK4UB, 0, ALU_OP0_NOP, tgsi_unsupported},
{44, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_SEQ, 0, ALU_OP2_SETE, tgsi_op2},
- {TGSI_OPCODE_SFL, 0, ALU_OP0_NOP, tgsi_unsupported},
+ {46, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_SGT, 0, ALU_OP2_SETGT, tgsi_op2},
{TGSI_OPCODE_SIN, 0, ALU_OP1_SIN, tgsi_trig},
{TGSI_OPCODE_SLE, 0, ALU_OP2_SETGE, tgsi_op2_swap},
{TGSI_OPCODE_SNE, 0, ALU_OP2_SETNE, tgsi_op2},
- {TGSI_OPCODE_STR, 0, ALU_OP0_NOP, tgsi_unsupported},
+ {51, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_TEX, 0, FETCH_OP_SAMPLE, tgsi_tex},
{TGSI_OPCODE_TXD, 0, FETCH_OP_SAMPLE_G, tgsi_tex},
{TGSI_OPCODE_TXP, 0, FETCH_OP_SAMPLE, tgsi_tex},
@@ -7433,12 +7433,12 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = {
{TGSI_OPCODE_PK4UB, 0, ALU_OP0_NOP, tgsi_unsupported},
{44, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_SEQ, 0, ALU_OP2_SETE, tgsi_op2},
- {TGSI_OPCODE_SFL, 0, ALU_OP0_NOP, tgsi_unsupported},
+ {46, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_SGT, 0, ALU_OP2_SETGT, tgsi_op2},
{TGSI_OPCODE_SIN, 0, ALU_OP1_SIN, tgsi_trig},
{TGSI_OPCODE_SLE, 0, ALU_OP2_SETGE, tgsi_op2_swap},
{TGSI_OPCODE_SNE, 0, ALU_OP2_SETNE, tgsi_op2},
- {TGSI_OPCODE_STR, 0, ALU_OP0_NOP, tgsi_unsupported},
+ {51, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_TEX, 0, FETCH_OP_SAMPLE, tgsi_tex},
{TGSI_OPCODE_TXD, 0, FETCH_OP_SAMPLE_G, tgsi_tex},
{TGSI_OPCODE_TXP, 0, FETCH_OP_SAMPLE, tgsi_tex},
@@ -7632,12 +7632,12 @@ static struct r600_shader_tgsi_instruction cm_shader_tgsi_instruction[] = {
{TGSI_OPCODE_PK4UB, 0, ALU_OP0_NOP, tgsi_unsupported},
{44, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_SEQ, 0, ALU_OP2_SETE, tgsi_op2},
- {TGSI_OPCODE_SFL, 0, ALU_OP0_NOP, tgsi_unsupported},
+ {46, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_SGT, 0, ALU_OP2_SETGT, tgsi_op2},
{TGSI_OPCODE_SIN, 0, ALU_OP1_SIN, cayman_trig},
{TGSI_OPCODE_SLE, 0, ALU_OP2_SETGE, tgsi_op2_swap},
{TGSI_OPCODE_SNE, 0, ALU_OP2_SETNE, tgsi_op2},
- {TGSI_OPCODE_STR, 0, ALU_OP0_NOP, tgsi_unsupported},
+ {51, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_TEX, 0, FETCH_OP_SAMPLE, tgsi_tex},
{TGSI_OPCODE_TXD, 0, FETCH_OP_SAMPLE_G, tgsi_tex},
{TGSI_OPCODE_TXP, 0, FETCH_OP_SAMPLE, tgsi_tex},