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authorDave Airlie <[email protected]>2014-11-24 12:53:40 +1000
committerDave Airlie <[email protected]>2014-11-27 10:31:38 +1000
commit07ae69753c6818bcce5d4edaf2cca39c20e37f4c (patch)
tree94119bf2ec201d83c630943cc0921dabe5de2150 /src/gallium/drivers/r600/r600_shader.c
parentbc5f5424e3a8cf0cd0a07bcf3d85670735a49f41 (diff)
r600g: merge the TXQ and BUFFER constant buffers (v1.1)
We are using 1 more buffer than we have, although in the future the driver should just end up using one buffer in total probably, this is a good first step, it merges the txq cube array and buffer info constants on r600 and evergreen. This should in theory fix geom shader tests on r600. v1.1: fix comments from Glenn. Reviewed-by: Glenn Kennard <[email protected]> Cc: "10.4 10.3" <[email protected] Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/r600_shader.c')
-rw-r--r--src/gallium/drivers/r600/r600_shader.c18
1 files changed, 13 insertions, 5 deletions
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 7a2609a2c1d..7bb98728a99 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -5035,8 +5035,9 @@ static int r600_do_buffer_txq(struct r600_shader_ctx *ctx)
alu.op = ALU_OP1_MOV;
if (ctx->bc->chip_class >= EVERGREEN) {
- alu.src[0].sel = 512 + (id / 4);
- alu.src[0].chan = id % 4;
+ /* channel 0 or 2 of each word */
+ alu.src[0].sel = 512 + (id / 2);
+ alu.src[0].chan = (id % 2) * 2;
} else {
/* r600 we have them at channel 2 of the second dword */
alu.src[0].sel = 512 + (id * 2) + 1;
@@ -5697,9 +5698,16 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP1_MOV;
- alu.src[0].sel = 512 + (id / 4);
- alu.src[0].kc_bank = R600_TXQ_CONST_BUFFER;
- alu.src[0].chan = id % 4;
+ if (ctx->bc->chip_class >= EVERGREEN) {
+ /* channel 1 or 3 of each word */
+ alu.src[0].sel = 512 + (id / 2);
+ alu.src[0].chan = ((id % 2) * 2) + 1;
+ } else {
+ /* r600 we have them at channel 2 of the second dword */
+ alu.src[0].sel = 512 + (id * 2) + 1;
+ alu.src[0].chan = 2;
+ }
+ alu.src[0].kc_bank = R600_BUFFER_INFO_CONST_BUFFER;
tgsi_dst(ctx, &inst->Dst[0], 2, &alu.dst);
alu.last = 1;
r = r600_bytecode_add_alu(ctx->bc, &alu);