r600g: add SSG, SEQ, SGT and SNE

1 files changed, 72 insertions, 12 deletions

diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 828082d10b9..3caeaa3a2a1 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -684,7 +684,7 @@ static int tgsi_kill(struct r600_shader_ctx *ctx)
 		memset(&alu, 0, sizeof(struct r600_bc_alu));
 		alu.inst = ctx->inst_info->r600_opcode;
 		alu.dst.chan = i;
-		alu.src[0].sel = 248;
+		alu.src[0].sel = SQ_ALU_SRC_0;
 		r = tgsi_src(ctx, &inst->Src[0], &alu.src[1]);
 		if (r)
 			return r;
@@ -743,7 +743,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx)
 	/* dst.x, <- 1.0  */
 	memset(&alu, 0, sizeof(struct r600_bc_alu));
 	alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
-	alu.src[0].sel  = 249; /*1.0*/
+	alu.src[0].sel  = SQ_ALU_SRC_1; /*1.0*/
 	alu.src[0].chan = 0;
 	r = tgsi_dst(ctx, &inst->Dst[0], 0, &alu.dst);
 	if (r)
@@ -759,7 +759,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx)
 	r = tgsi_src(ctx, &inst->Src[0], &alu.src[0]);
 	if (r)
 		return r;
-	alu.src[1].sel  = 248; /*0.0*/
+	alu.src[1].sel  = SQ_ALU_SRC_0; /*0.0*/
 	alu.src[1].chan = tgsi_chan(&inst->Src[0], 0);
 	r = tgsi_dst(ctx, &inst->Dst[0], 1, &alu.dst);
 	if (r)
@@ -780,7 +780,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx)
 	/* dst.w, <- 1.0  */
 	memset(&alu, 0, sizeof(struct r600_bc_alu));
 	alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
-	alu.src[0].sel  = 249;
+	alu.src[0].sel  = SQ_ALU_SRC_1;
 	alu.src[0].chan = 0;
 	r = tgsi_dst(ctx, &inst->Dst[0], 3, &alu.dst);
 	if (r)
@@ -919,6 +919,66 @@ static int tgsi_trans_srcx_replicate(struct r600_shader_ctx *ctx)
 	return 0;
 }
 
+static int tgsi_ssg(struct r600_shader_ctx *ctx)
+{
+	struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
+	struct r600_bc_alu alu;
+	struct r600_bc_alu_src r600_src[3];
+	int i, j, r;
+
+	r = tgsi_split_constant(ctx, r600_src);
+	if (r)
+		return r;
+
+	/* tmp = (src > 0 ? 1 : src) */
+	for (i = 0; i < 4; i++) {
+		memset(&alu, 0, sizeof(struct r600_bc_alu));
+		alu.inst = V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT;
+		alu.is_op3 = 1;
+		alu.dst.sel = ctx->temp_reg;
+		alu.dst.write = 1;
+
+		alu.src[0] = r600_src[0];
+		alu.src[0].chan = tgsi_chan(&inst->Src[0], i);
+
+		alu.src[1].sel = SQ_ALU_SRC_1;
+
+		alu.src[2] = r600_src[0];
+		alu.src[2].chan = tgsi_chan(&inst->Src[0], i);
+		if (i == 3)
+			alu.last = 1;
+		r = r600_bc_add_alu(ctx->bc, &alu);
+		if (r)
+			return r;
+	}
+
+	/* dst = (-tmp > 0 ? -1 : tmp) */
+	for (i = 0; i < 4; i++) {
+		memset(&alu, 0, sizeof(struct r600_bc_alu));
+		alu.inst = V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT;
+		alu.is_op3 = 1;
+		r = tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+		if (r)
+			return r;
+
+		alu.src[0].sel = ctx->temp_reg;
+		alu.src[0].neg = 1;
+
+		alu.src[1].sel = SQ_ALU_SRC_1;
+		alu.src[1].neg = 1;
+
+		alu.src[2].sel = ctx->temp_reg;
+
+		alu.dst.write = 1;
+		if (i == 3)
+			alu.last = 1;
+		r = r600_bc_add_alu(ctx->bc, &alu);
+		if (r)
+			return r;
+	}
+	return 0;
+}
+
 static int tgsi_helper_copy(struct r600_shader_ctx *ctx, struct tgsi_full_instruction *inst)
 {
 	struct r600_bc_alu alu;
@@ -1006,13 +1066,13 @@ static int tgsi_dp(struct r600_shader_ctx *ctx)
 		switch (ctx->inst_info->tgsi_opcode) {
 		case TGSI_OPCODE_DP2:
 			if (i > 1) {
-				alu.src[0].sel = alu.src[1].sel = 248;
+				alu.src[0].sel = alu.src[1].sel = SQ_ALU_SRC_0;
 				alu.src[0].chan = alu.src[1].chan = 0;
 			}
 			break;
 		case TGSI_OPCODE_DP3:
 			if (i > 2) {
-				alu.src[0].sel = alu.src[1].sel = 248;
+				alu.src[0].sel = alu.src[1].sel = SQ_ALU_SRC_0;
 				alu.src[0].chan = alu.src[1].chan = 0;
 			}
 			break;
@@ -1069,7 +1129,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
 		}
 		memset(&alu, 0, sizeof(struct r600_bc_alu));
 		alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
-		alu.src[0].sel = 249;
+		alu.src[0].sel = SQ_ALU_SRC_1;
 		alu.src[0].chan = 0;
 		alu.dst.sel = ctx->temp_reg;
 		alu.dst.chan = 3;
@@ -1136,7 +1196,7 @@ static int tgsi_lrp(struct r600_shader_ctx *ctx)
 	for (i = 0; i < 4; i++) {
 		memset(&alu, 0, sizeof(struct r600_bc_alu));
 		alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD;
-		alu.src[0].sel = 249;
+		alu.src[0].sel = SQ_ALU_SRC_1;
 		alu.src[0].chan = 0;
 		alu.src[1] = r600_src[0];
 		alu.src[1].chan = tgsi_chan(&inst->Src[0], i);
@@ -1249,12 +1309,12 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
 	{TGSI_OPCODE_PK4B,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_PK4UB,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_RFL,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
-	{TGSI_OPCODE_SEQ,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+	{TGSI_OPCODE_SEQ,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE, tgsi_op2},
 	{TGSI_OPCODE_SFL,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
-	{TGSI_OPCODE_SGT,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+	{TGSI_OPCODE_SGT,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT, tgsi_op2},
 	{TGSI_OPCODE_SIN,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_SLE,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE, tgsi_slt},
-	{TGSI_OPCODE_SNE,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+	{TGSI_OPCODE_SNE,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE, tgsi_op2},
 	{TGSI_OPCODE_STR,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_TEX,	0, SQ_TEX_INST_SAMPLE, tgsi_tex},
 	{TGSI_OPCODE_TXD,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
@@ -1269,7 +1329,7 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
 	{TGSI_OPCODE_BRA,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_CAL,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_RET,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
-	{TGSI_OPCODE_SSG,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, /* SGN */
+	{TGSI_OPCODE_SSG,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_ssg},
 	{TGSI_OPCODE_CMP,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_SCS,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_TXB,	0, SQ_TEX_INST_SAMPLE_L, tgsi_tex},