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authorMarek Olšák <[email protected]>2018-06-18 21:07:10 -0400
committerMarek Olšák <[email protected]>2018-06-19 13:08:50 -0400
commit6703fec58cc38d18b2268544889659ea049060aa (patch)
treefd2ddd0c281853a7b4e7a366c80b14d43ff3885c /src/gallium/drivers/r600/r600_pipe.h
parent39b4fdc45f85703daa7fe3804b52b555ebf9f080 (diff)
amd,radeonsi: rename radeon_winsys_cs -> radeon_cmdbuf
Acked-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/r600_pipe.h')
-rw-r--r--src/gallium/drivers/r600/r600_pipe.h16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index 6d090930522..99be2f9ce66 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -616,7 +616,7 @@ struct r600_context {
uint32_t append_fence_id;
};
-static inline void r600_emit_command_buffer(struct radeon_winsys_cs *cs,
+static inline void r600_emit_command_buffer(struct radeon_cmdbuf *cs,
struct r600_command_buffer *cb)
{
assert(cs->current.cdw + cb->num_dw <= cs->current.max_dw);
@@ -804,10 +804,10 @@ uint32_t evergreen_get_ls_hs_config(struct r600_context *rctx,
const struct pipe_draw_info *info,
unsigned num_patches);
void evergreen_set_ls_hs_config(struct r600_context *rctx,
- struct radeon_winsys_cs *cs,
+ struct radeon_cmdbuf *cs,
uint32_t ls_hs_config);
void evergreen_set_lds_alloc(struct r600_context *rctx,
- struct radeon_winsys_cs *cs,
+ struct radeon_cmdbuf *cs,
uint32_t lds_alloc);
/* r600_state_common.c */
@@ -980,14 +980,14 @@ static inline void eg_store_loop_const(struct r600_command_buffer *cb, unsigned
void r600_init_command_buffer(struct r600_command_buffer *cb, unsigned num_dw);
void r600_release_command_buffer(struct r600_command_buffer *cb);
-static inline void radeon_compute_set_context_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
+static inline void radeon_compute_set_context_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num)
{
radeon_set_context_reg_seq(cs, reg, num);
/* Set the compute bit on the packet header */
cs->current.buf[cs->current.cdw - 2] |= RADEON_CP_PACKET3_COMPUTE_MODE;
}
-static inline void radeon_set_ctl_const_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
+static inline void radeon_set_ctl_const_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num)
{
assert(reg >= R600_CTL_CONST_OFFSET);
assert(cs->current.cdw + 2 + num <= cs->current.max_dw);
@@ -995,13 +995,13 @@ static inline void radeon_set_ctl_const_seq(struct radeon_winsys_cs *cs, unsigne
radeon_emit(cs, (reg - R600_CTL_CONST_OFFSET) >> 2);
}
-static inline void radeon_compute_set_context_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value)
+static inline void radeon_compute_set_context_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value)
{
radeon_compute_set_context_reg_seq(cs, reg, 1);
radeon_emit(cs, value);
}
-static inline void radeon_set_context_reg_flag(struct radeon_winsys_cs *cs, unsigned reg, unsigned value, unsigned flag)
+static inline void radeon_set_context_reg_flag(struct radeon_cmdbuf *cs, unsigned reg, unsigned value, unsigned flag)
{
if (flag & RADEON_CP_PACKET3_COMPUTE_MODE) {
radeon_compute_set_context_reg(cs, reg, value);
@@ -1010,7 +1010,7 @@ static inline void radeon_set_context_reg_flag(struct radeon_winsys_cs *cs, unsi
}
}
-static inline void radeon_set_ctl_const(struct radeon_winsys_cs *cs, unsigned reg, unsigned value)
+static inline void radeon_set_ctl_const(struct radeon_cmdbuf *cs, unsigned reg, unsigned value)
{
radeon_set_ctl_const_seq(cs, reg, 1);
radeon_emit(cs, value);