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authorMarek Olšák <[email protected]>2012-02-24 16:36:05 +0100
committerMarek Olšák <[email protected]>2012-03-05 14:22:19 +0100
commit370c8b5ee7666f4f515d63603afe8282b1b3c682 (patch)
treef048581b0075accc2ede961cb31499a05e97286e /src/gallium/drivers/r600/r600_pipe.c
parent0018db1126c443c4d70947010dcf1afa37e5fb16 (diff)
r600g: remove obsolete todo comments
Also use XXX in the other ones, because it's the most used word for that purpose in Mesa. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/r600_pipe.c')
-rw-r--r--src/gallium/drivers/r600/r600_pipe.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index b422d753078..fe801aba19f 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -445,7 +445,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
/* Render targets. */
case PIPE_CAP_MAX_RENDER_TARGETS:
- /* FIXME some r6xx are buggy and can only do 4 */
+ /* XXX some r6xx are buggy and can only do 4 */
return 8;
/* Timer queries, present when the clock frequency is non zero. */
@@ -497,14 +497,14 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
case PIPE_SHADER_VERTEX:
break;
case PIPE_SHADER_GEOMETRY:
- /* TODO: support and enable geometry programs */
+ /* XXX: support and enable geometry programs */
return 0;
default:
- /* TODO: support tessellation on Evergreen */
+ /* XXX: support tessellation on Evergreen */
return 0;
}
- /* TODO: all these should be fixed, since r600 surely supports much more! */
+ /* XXX: all these should be fixed, since r600 surely supports much more! */
switch (param) {
case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
@@ -512,7 +512,7 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
return 16384;
case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
- return 8; /* FIXME */
+ return 8; /* XXX */
case PIPE_SHADER_CAP_MAX_INPUTS:
if(shader == PIPE_SHADER_FRAGMENT)
return 34;
@@ -521,14 +521,14 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
case PIPE_SHADER_CAP_MAX_TEMPS:
return 256; /* Max native temporaries. */
case PIPE_SHADER_CAP_MAX_ADDRS:
- /* FIXME Isn't this equal to TEMPS? */
+ /* XXX Isn't this equal to TEMPS? */
return 1; /* Max native address registers */
case PIPE_SHADER_CAP_MAX_CONSTS:
return R600_MAX_CONST_BUFFER_SIZE;
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return R600_MAX_CONST_BUFFERS-1;
case PIPE_SHADER_CAP_MAX_PREDS:
- return 0; /* FIXME */
+ return 0; /* nothing uses this */
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
return 1;
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: