diff options
| author | Nicolai Hähnle <[email protected]> | 2016-04-29 22:15:48 -0500 |
|---|---|---|
| committer | Nicolai Hähnle <[email protected]> | 2016-05-07 16:46:59 -0500 |
| commit | 60d2fc233bc7f15120f72119f9af678175a9b40d (patch) | |
| tree | 4e5add7d0a162d04f6ff5d8bd7457f0725ce89bc /src/gallium/drivers/r600/r600_opcodes.h | |
| parent | 62b7958cd0ec03ff1e15144f0104728458621d1d (diff) | |
gallium/radeon: clean left-shift undefined behavior
Shifting into the sign bit of a signed int is undefined behavior.
Unfortunately, there are potentially many places where this happens using
the register macros.
This commit is the result of running
sed -ie "s/(((\(\w\+\)) & 0x\(\w\+\)) << \(\w\+\))/(((unsigned)(\1) \& 0x\2) << \3)/g"
on all header files in gallium/{r600,radeon,radeonsi}.
Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/r600_opcodes.h')
| -rw-r--r-- | src/gallium/drivers/r600/r600_opcodes.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/gallium/drivers/r600/r600_opcodes.h b/src/gallium/drivers/r600/r600_opcodes.h index eae1a837a52..b27e123c054 100644 --- a/src/gallium/drivers/r600/r600_opcodes.h +++ b/src/gallium/drivers/r600/r600_opcodes.h @@ -2,18 +2,18 @@ #ifndef R600_OPCODES_H #define R600_OPCODES_H -#define R600_S_SQ_CF_WORD1_CF_INST(x) (((x) & 0x7F) << 23) +#define R600_S_SQ_CF_WORD1_CF_INST(x) (((unsigned)(x) & 0x7F) << 23) #define R600_G_SQ_CF_WORD1_CF_INST(x) (((x) >> 23) & 0x7F) -#define R600_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(x) (((x) & 0x7F) << 23) +#define R600_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(x) (((unsigned)(x) & 0x7F) << 23) #define R600_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(x) (((x) >> 23) & 0x7F) -#define R600_S_SQ_CF_ALU_WORD1_CF_INST(x) (((x) & 0xF) << 26) +#define R600_S_SQ_CF_ALU_WORD1_CF_INST(x) (((unsigned)(x) & 0xF) << 26) #define R600_G_SQ_CF_ALU_WORD1_CF_INST(x) (((x) >> 26) & 0xF) -#define EG_S_SQ_CF_WORD1_CF_INST(x) (((x) & 0xFF) << 22) +#define EG_S_SQ_CF_WORD1_CF_INST(x) (((unsigned)(x) & 0xFF) << 22) #define EG_G_SQ_CF_WORD1_CF_INST(x) (((x) >> 22) & 0xFF) -#define EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(x) (((x) & 0xFF) << 22) +#define EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(x) (((unsigned)(x) & 0xFF) << 22) #define EG_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(x) (((x) >> 22) & 0xFF) -#define EG_S_SQ_CF_ALU_WORD1_CF_INST(x) (((x) & 0xF) << 26) +#define EG_S_SQ_CF_ALU_WORD1_CF_INST(x) (((unsigned)(x) & 0xF) << 26) #define EG_G_SQ_CF_ALU_WORD1_CF_INST(x) (((x) >> 26) & 0xF) #define V_SQ_CF_WORD1_SQ_CF_INST_NOP R600_S_SQ_CF_WORD1_CF_INST(0x00000000) |