r600g/compute: Enable PIPE_SHADER_IR_NATIVE for compute shaders v2

v2:
  - Drop dependency on LLVM >= 3.5.1

1 files changed, 47 insertions, 24 deletions

diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c
index 766141968a0..c19693a03e6 100644
--- a/src/gallium/drivers/r600/r600_llvm.c
+++ b/src/gallium/drivers/r600/r600_llvm.c
@@ -13,8 +13,9 @@
 #include "r600_opcodes.h"
 #include "r600_shader.h"
 #include "r600_pipe.h"
-#include "radeon/radeon_llvm.h"
-#include "radeon/radeon_llvm_emit.h"
+#include "radeon_llvm.h"
+#include "radeon_llvm_emit.h"
+#include "radeon_elf_util.h"
 
 #include <stdio.h>
 
@@ -818,31 +819,20 @@ LLVMModuleRef r600_tgsi_llvm(
 #define R_028868_SQ_PGM_RESOURCES_VS                 0x028868
 #define R_028850_SQ_PGM_RESOURCES_PS                 0x028850
 
-unsigned r600_llvm_compile(
-	LLVMModuleRef mod,
-	enum radeon_family family,
-	struct r600_bytecode *bc,
-	boolean *use_kill,
-	unsigned dump)
+void r600_shader_binary_read_config(const struct radeon_shader_binary *binary,
+					struct r600_bytecode *bc,
+					uint64_t symbol_offset,
+					boolean *use_kill)
 {
-	unsigned r;
-	struct radeon_shader_binary binary;
-	const char * gpu_family = r600_get_llvm_processor_name(family);
 	unsigned i;
+	const unsigned char *config =
+		radeon_shader_binary_config_start(binary, symbol_offset);
 
-	memset(&binary, 0, sizeof(struct radeon_shader_binary));
-	r = radeon_llvm_compile(mod, &binary, gpu_family, dump);
-
-	assert(binary.code_size % 4 == 0);
-	bc->bytecode = CALLOC(1, binary.code_size);
-	memcpy(bc->bytecode, binary.code, binary.code_size);
-	bc->ndw = binary.code_size / 4;
-
-	for (i = 0; i < binary.config_size; i+= 8) {
+	for (i = 0; i < binary->config_size_per_symbol; i+= 8) {
 		unsigned reg =
-			util_le32_to_cpu(*(uint32_t*)(binary.config + i));
+			util_le32_to_cpu(*(uint32_t*)(config + i));
 		unsigned value =
-			util_le32_to_cpu(*(uint32_t*)(binary.config + i + 4));
+			util_le32_to_cpu(*(uint32_t*)(config + i + 4));
 		switch (reg) {
 		/* R600 / R700 */
 		case R_028850_SQ_PGM_RESOURCES_PS:
@@ -851,8 +841,8 @@ unsigned r600_llvm_compile(
 		case R_028844_SQ_PGM_RESOURCES_PS:
 		case R_028860_SQ_PGM_RESOURCES_VS:
 		case R_0288D4_SQ_PGM_RESOURCES_LS:
-			bc->ngpr = G_028844_NUM_GPRS(value);
-			bc->nstack = G_028844_STACK_SIZE(value);
+			bc->ngpr = MAX2(bc->ngpr, G_028844_NUM_GPRS(value));
+			bc->nstack = MAX2(bc->nstack, G_028844_STACK_SIZE(value));
 			break;
 		case R_02880C_DB_SHADER_CONTROL:
 			*use_kill = G_02880C_KILL_ENABLE(value);
@@ -863,6 +853,39 @@ unsigned r600_llvm_compile(
 		}
 	}
 
+}
+
+unsigned r600_create_shader(struct r600_bytecode *bc,
+		const struct radeon_shader_binary *binary,
+		boolean *use_kill)
+
+{
+	assert(binary->code_size % 4 == 0);
+	bc->bytecode = CALLOC(1, binary->code_size);
+	memcpy(bc->bytecode, binary->code, binary->code_size);
+	bc->ndw = binary->code_size / 4;
+
+	r600_shader_binary_read_config(binary, bc, 0, use_kill);
+
+	return 0;
+}
+
+unsigned r600_llvm_compile(
+	LLVMModuleRef mod,
+	enum radeon_family family,
+	struct r600_bytecode *bc,
+	boolean *use_kill,
+	unsigned dump)
+{
+	unsigned r;
+	struct radeon_shader_binary binary;
+	const char * gpu_family = r600_get_llvm_processor_name(family);
+
+	memset(&binary, 0, sizeof(struct radeon_shader_binary));
+	r = radeon_llvm_compile(mod, &binary, gpu_family, dump);
+
+	r = r600_create_shader(bc, &binary, use_kill);
+
 	FREE(binary.code);
 	FREE(binary.config);