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authorVadim Girlin <[email protected]>2012-05-07 20:22:29 +0400
committerVadim Girlin <[email protected]>2012-05-08 01:18:21 +0400
commit2a88dfc521bff7255e27e2ef8efcd08f9db53747 (patch)
tree4abb8a7257cdcb5f157003501e562dcfc1387557 /src/gallium/drivers/r600/r600_llvm.c
parent3f8c37967a66da6bc63b283b3eba69fd48eba2f6 (diff)
radeon/llvm: use bitcasts for integers
We're using float as default type, so basically for every instruction that wants other types for dst/src operands we need to perform the bitcast to/from default float. Currently bitcast produces no-op MOV instruction, will be eliminated later. Signed-off-by: Vadim Girlin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/r600_llvm.c')
-rw-r--r--src/gallium/drivers/r600/r600_llvm.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c
index d467baf60fb..a36760cb56f 100644
--- a/src/gallium/drivers/r600/r600_llvm.c
+++ b/src/gallium/drivers/r600/r600_llvm.c
@@ -21,10 +21,12 @@ static LLVMValueRef llvm_fetch_const(
enum tgsi_opcode_type type,
unsigned swizzle)
{
- return lp_build_intrinsic_unary(bld_base->base.gallivm->builder,
+ LLVMValueRef cval = lp_build_intrinsic_unary(bld_base->base.gallivm->builder,
"llvm.AMDGPU.load.const", bld_base->base.elem_type,
lp_build_const_int32(bld_base->base.gallivm,
radeon_llvm_reg_index_soa(reg->Register.Index, swizzle)));
+
+ return bitcast(bld_base, type, cval);
}
static void llvm_load_input(