r600g: make tgsi-to-llvm generates store.pixel* intrinsic for fs

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

1 files changed, 63 insertions, 8 deletions

diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c
index 3dec8ae2537..b3d4e6bab68 100644
--- a/src/gallium/drivers/r600/r600_llvm.c
+++ b/src/gallium/drivers/r600/r600_llvm.c
@@ -229,6 +229,9 @@ static void llvm_emit_epilogue(struct lp_build_tgsi_context * bld_base)
 	struct radeon_llvm_context * ctx = radeon_llvm_context(bld_base);
 	struct lp_build_context * base = &bld_base->base;
 	unsigned i;
+	
+	unsigned color_count = 0;
+	boolean has_color = false;
 
 	/* Add the necessary export instructions */
 	for (i = 0; i < ctx->output_reg_count; i++) {
@@ -237,20 +240,72 @@ static void llvm_emit_epilogue(struct lp_build_tgsi_context * bld_base)
 			LLVMValueRef output;
 			unsigned adjusted_reg_idx = i +
 					ctx->reserved_reg_count;
-			LLVMValueRef reg_index = lp_build_const_int32(
-				base->gallivm,
-				radeon_llvm_reg_index_soa(adjusted_reg_idx, chan));
 
 			output = LLVMBuildLoad(base->gallivm->builder,
 				ctx->soa.outputs[i][chan], "");
 
-			lp_build_intrinsic_binary(
-				base->gallivm->builder,
-				"llvm.AMDGPU.store.output",
-				LLVMVoidTypeInContext(base->gallivm->context),
-				output, reg_index);
+			if (ctx->type == TGSI_PROCESSOR_VERTEX) {
+				LLVMValueRef reg_index = lp_build_const_int32(
+					base->gallivm,
+					radeon_llvm_reg_index_soa(adjusted_reg_idx, chan));
+				lp_build_intrinsic_binary(
+					base->gallivm->builder,
+					"llvm.AMDGPU.store.output",
+					LLVMVoidTypeInContext(base->gallivm->context),
+					output, reg_index);
+			} else if (ctx->type == TGSI_PROCESSOR_FRAGMENT) {
+				switch (ctx->r600_outputs[i].name) {
+				case TGSI_SEMANTIC_COLOR:
+					has_color = true;
+					if ( color_count/4 < ctx->color_buffer_count) {
+						if (ctx->fs_color_all) {
+							for (unsigned j = 0; j < ctx->color_buffer_count; j++) {
+								LLVMValueRef reg_index = lp_build_const_int32(
+									base->gallivm,
+									(j * 4) + chan);
+								lp_build_intrinsic_binary(
+									base->gallivm->builder,
+									"llvm.R600.store.pixel.color",
+									LLVMVoidTypeInContext(base->gallivm->context),
+									output, reg_index);
+							}
+						} else {
+							LLVMValueRef reg_index = lp_build_const_int32(
+								base->gallivm,
+								(color_count++/4) * 4 + chan);
+							lp_build_intrinsic_binary(
+								base->gallivm->builder,
+								"llvm.R600.store.pixel.color",
+								LLVMVoidTypeInContext(base->gallivm->context),
+								output, reg_index);
+						}
+					}
+					break;
+				case TGSI_SEMANTIC_POSITION:
+					if (chan != 2)
+						continue;
+					lp_build_intrinsic_unary(
+						base->gallivm->builder,
+						"llvm.R600.store.pixel.depth",
+						LLVMVoidTypeInContext(base->gallivm->context),
+						output);
+					break;
+				case TGSI_SEMANTIC_STENCIL:
+					if (chan != 1)
+						continue;
+					lp_build_intrinsic_unary(
+						base->gallivm->builder,
+						"llvm.R600.store.pixel.stencil",
+						LLVMVoidTypeInContext(base->gallivm->context),
+						output);
+					break;
+				}
+			}
 		}
 	}
+
+	if (!has_color && ctx->type == TGSI_PROCESSOR_FRAGMENT)
+		lp_build_intrinsic(base->gallivm->builder, "llvm.R600.store.pixel.dummy", LLVMVoidTypeInContext(base->gallivm->context), 0, 0);
 }
 
 static void llvm_emit_tex(