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author | Rob Clark <[email protected]> | 2013-10-24 17:45:27 -0400 |
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committer | Rob Clark <[email protected]> | 2013-10-24 20:21:08 -0400 |
commit | 4317c4e6e05f84a985ff76a7f66e506681d8e37f (patch) | |
tree | 3cbfbd6cdc8409130ea9e79ec4faf8506b03efb9 /src/gallium/drivers/r600/r600_buffer.c | |
parent | bfd30935c996f453fff7345c79dcef4e83d89cfb (diff) |
freedreno/a3xx: fix const/rel/const-rel encoding
The encoding of constant, relative, and relative-const src registers is
a bit more complex than originally thought, which gives an extra bit to
encode const reg # at expense of taking a bit from relative offset.
In most cases a3xx seems to actually use a scheme whereby it can encode
an extra bit for const register. You have three possible encodings in
thirteen bits:
register: (11 bits for N.c)
00........... rN.c
relative: (10 bits for N)
010.......... r<a0.x + N>
011.......... c<a0.x + N>
const: (12 bits for N.c)
1............ cN.c
Which means we can deal w/ more consts than previously thought.
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/r600_buffer.c')
0 files changed, 0 insertions, 0 deletions