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authorMarek Olšák <[email protected]>2012-10-12 18:46:32 +0200
committerMarek Olšák <[email protected]>2012-10-29 12:51:41 +0100
commit96ed6c90eff58ce030c39c2b4db6daf512586b34 (patch)
tree5fc59c951dd1fc7ac3f70354f6f4e3581ba5b8aa /src/gallium/drivers/r600/r600_asm.h
parentb3921e1f53833420e0a0fd581f741744e7957a05 (diff)
r600g: implement texturing with 8x MSAA compressed surfaces for Evergreen
The 2x and 4x MSAA cases are completely broken. The lfdptr instruction returns garbage there. The 8x MSAA case is broken on Cayman, though at least the result looks somewhat correct. Only the 8x MSAA case works on Evergreen and is enabled.
Diffstat (limited to 'src/gallium/drivers/r600/r600_asm.h')
-rw-r--r--src/gallium/drivers/r600/r600_asm.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/gallium/drivers/r600/r600_asm.h b/src/gallium/drivers/r600/r600_asm.h
index 8a9f3189be0..2c7db2cefd7 100644
--- a/src/gallium/drivers/r600/r600_asm.h
+++ b/src/gallium/drivers/r600/r600_asm.h
@@ -62,6 +62,7 @@ struct r600_bytecode_alu {
struct r600_bytecode_tex {
struct list_head list;
unsigned inst;
+ unsigned inst_mod;
unsigned resource_id;
unsigned src_gpr;
unsigned src_rel;
@@ -195,6 +196,7 @@ struct r600_cf_callstack {
struct r600_bytecode {
enum chip_class chip_class;
+ enum r600_msaa_texture_mode msaa_texture_mode;
int type;
struct list_head cf;
struct r600_bytecode_cf *cf_last;
@@ -219,7 +221,10 @@ struct r600_bytecode {
int eg_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf);
/* r600_asm.c */
-void r600_bytecode_init(struct r600_bytecode *bc, enum chip_class chip_class, enum radeon_family family);
+void r600_bytecode_init(struct r600_bytecode *bc,
+ enum chip_class chip_class,
+ enum radeon_family family,
+ enum r600_msaa_texture_mode msaa_texture_mode);
void r600_bytecode_clear(struct r600_bytecode *bc);
int r600_bytecode_add_alu(struct r600_bytecode *bc, const struct r600_bytecode_alu *alu);
int r600_bytecode_add_vtx(struct r600_bytecode *bc, const struct r600_bytecode_vtx *vtx);