diff options
author | Vadim Girlin <[email protected]> | 2013-02-01 11:45:35 +0400 |
---|---|---|
committer | Vadim Girlin <[email protected]> | 2013-02-01 12:08:42 +0400 |
commit | 022122ee63b8a00afc23eaa347df934a79fb1d4c (patch) | |
tree | b014eeb8150f2425140973923f9a7d4052e52ec5 /src/gallium/drivers/r600/r600_asm.h | |
parent | b68a3b865be2dbd002f1fb8fc3eba20c4293a5bd (diff) |
r600g: use tables with ISA info v3
v3: added some flags including condition codes for ALU,
fixed issue with CF reverse lookup (overlapping ranges of CF_ALU_xxx
and other CF instructions)
rebased on current master
Signed-off-by: Vadim Girlin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/r600_asm.h')
-rw-r--r-- | src/gallium/drivers/r600/r600_asm.h | 62 |
1 files changed, 33 insertions, 29 deletions
diff --git a/src/gallium/drivers/r600/r600_asm.h b/src/gallium/drivers/r600/r600_asm.h index 0b33c380098..b3dfc24ff45 100644 --- a/src/gallium/drivers/r600/r600_asm.h +++ b/src/gallium/drivers/r600/r600_asm.h @@ -24,6 +24,7 @@ #define R600_ASM_H #include "r600_pipe.h" +#include "r600_isa.h" struct r600_bytecode_alu_src { unsigned sel; @@ -47,7 +48,7 @@ struct r600_bytecode_alu { struct list_head list; struct r600_bytecode_alu_src src[3]; struct r600_bytecode_alu_dst dst; - unsigned inst; + unsigned op; unsigned last; unsigned is_op3; unsigned execute_mask; @@ -61,7 +62,7 @@ struct r600_bytecode_alu { struct r600_bytecode_tex { struct list_head list; - unsigned inst; + unsigned op; unsigned inst_mod; unsigned resource_id; unsigned src_gpr; @@ -89,7 +90,7 @@ struct r600_bytecode_tex { struct r600_bytecode_vtx { struct list_head list; - unsigned inst; + unsigned op; unsigned fetch_type; unsigned buffer_id; unsigned src_gpr; @@ -116,8 +117,7 @@ struct r600_bytecode_output { unsigned type; unsigned end_of_program; - /* CF_INST. This is already bit-shifted and only needs to be or'd for bytecode. */ - unsigned inst; + unsigned op; unsigned elem_size; unsigned gpr; @@ -135,20 +135,10 @@ struct r600_bytecode_kcache { unsigned addr; }; -/* A value of CF_NATIVE in r600_bytecode_cf::inst means that this instruction - * has already been encoded, and the encoding has been stored in - * r600_bytecode::isa. This is used by the LLVM backend to emit CF instructions - * e.g. RAT_WRITE_* that can't be properly represented by struct - * r600_bytecode_cf. - */ -#define CF_NATIVE ~0 - struct r600_bytecode_cf { struct list_head list; - /* CF_INST. This is already bit-shifted and only needs to be or'd for bytecode. */ - unsigned inst; - + unsigned op; unsigned addr; unsigned ndw; unsigned id; @@ -216,6 +206,7 @@ struct r600_bytecode { unsigned ar_chan; unsigned ar_handling; unsigned r6xx_nop_after_rel_dst; + struct r600_isa* isa; }; /* eg_asm.c */ @@ -227,16 +218,24 @@ void r600_bytecode_init(struct r600_bytecode *bc, enum radeon_family family, enum r600_msaa_texture_mode msaa_texture_mode); void r600_bytecode_clear(struct r600_bytecode *bc); -int r600_bytecode_add_alu(struct r600_bytecode *bc, const struct r600_bytecode_alu *alu); -int r600_bytecode_add_vtx(struct r600_bytecode *bc, const struct r600_bytecode_vtx *vtx); -int r600_bytecode_add_tex(struct r600_bytecode *bc, const struct r600_bytecode_tex *tex); -int r600_bytecode_add_output(struct r600_bytecode *bc, const struct r600_bytecode_output *output); +int r600_bytecode_add_alu(struct r600_bytecode *bc, + const struct r600_bytecode_alu *alu); +int r600_bytecode_add_vtx(struct r600_bytecode *bc, + const struct r600_bytecode_vtx *vtx); +int r600_bytecode_add_tex(struct r600_bytecode *bc, + const struct r600_bytecode_tex *tex); +int r600_bytecode_add_output(struct r600_bytecode *bc, + const struct r600_bytecode_output *output); int r600_bytecode_build(struct r600_bytecode *bc); -int r600_bytecode_add_cfinst(struct r600_bytecode *bc, int inst); -int r600_bytecode_add_alu_type(struct r600_bytecode *bc, const struct r600_bytecode_alu *alu, int type); -void r600_bytecode_special_constants(uint32_t value, unsigned *sel, unsigned *neg); +int r600_bytecode_add_cfinst(struct r600_bytecode *bc, + unsigned op); +int r600_bytecode_add_alu_type(struct r600_bytecode *bc, + const struct r600_bytecode_alu *alu, unsigned type); +void r600_bytecode_special_constants(uint32_t value, + unsigned *sel, unsigned *neg); void r600_bytecode_dump(struct r600_bytecode *bc); -void r600_bytecode_alu_read(struct r600_bytecode_alu *alu, uint32_t word0, uint32_t word1); +void r600_bytecode_alu_read(struct r600_bytecode *bc, + struct r600_bytecode_alu *alu, uint32_t word0, uint32_t word1); int cm_bytecode_add_cf_end(struct r600_bytecode *bc); @@ -245,11 +244,16 @@ void *r600_create_vertex_fetch_shader(struct pipe_context *ctx, const struct pipe_vertex_element *elements); /* r700_asm.c */ -void r700_bytecode_cf_vtx_build(uint32_t *bytecode, const struct r600_bytecode_cf *cf); -int r700_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, unsigned id); -void r700_bytecode_alu_read(struct r600_bytecode_alu *alu, uint32_t word0, uint32_t word1); -void r600_bytecode_export_read(struct r600_bytecode_output *output, uint32_t word0, uint32_t word1); -void eg_bytecode_export_read(struct r600_bytecode_output *output, uint32_t word0, uint32_t word1); +void r700_bytecode_cf_vtx_build(uint32_t *bytecode, + const struct r600_bytecode_cf *cf); +int r700_bytecode_alu_build(struct r600_bytecode *bc, + struct r600_bytecode_alu *alu, unsigned id); +void r700_bytecode_alu_read(struct r600_bytecode *bc, + struct r600_bytecode_alu *alu, uint32_t word0, uint32_t word1); +void r600_bytecode_export_read(struct r600_bytecode *bc, + struct r600_bytecode_output *output, uint32_t word0, uint32_t word1); +void eg_bytecode_export_read(struct r600_bytecode *bc, + struct r600_bytecode_output *output, uint32_t word0, uint32_t word1); void r600_vertex_data_type(enum pipe_format pformat, unsigned *format, unsigned *num_format, unsigned *format_comp, unsigned *endian); |