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authorTom Stellard <[email protected]>2012-02-27 15:42:48 -0500
committerTom Stellard <[email protected]>2012-05-02 09:39:09 -0400
commit94a6a363792e8cb57a9f15778a3f3440d5b754ab (patch)
tree5a5fa3be96df013a0c760054a9555fb5998407d3 /src/gallium/drivers/r600/r600_asm.c
parent4a26454e979251db25bab68685835fa32c099429 (diff)
r600g: Add FC_NATIVE instruction
This is a pseudo instruction that enables the LLVM backend to encode instructions and pass it through r600_bytecode_build() Signed-off-by: Tom Stellard <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/r600_asm.c')
-rw-r--r--src/gallium/drivers/r600/r600_asm.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c
index 651933bf37c..39bab38170c 100644
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src/gallium/drivers/r600/r600_asm.c
@@ -1927,6 +1927,7 @@ int r600_bytecode_build(struct r600_bytecode *bc)
case EG_V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
case EG_V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
case CM_V_SQ_CF_WORD1_SQ_CF_INST_END:
+ case CF_NATIVE:
break;
default:
R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst);
@@ -2069,6 +2070,8 @@ int r600_bytecode_build(struct r600_bytecode *bc)
case EG_V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
case CM_V_SQ_CF_WORD1_SQ_CF_INST_END:
break;
+ case CF_NATIVE:
+ break;
default:
R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst);
return -EINVAL;
@@ -2341,6 +2344,10 @@ void r600_bytecode_dump(struct r600_bytecode *bc)
fprintf(stderr, "COND:%X ", cf->cond);
fprintf(stderr, "POP_COUNT:%X\n", cf->pop_count);
break;
+ case CF_NATIVE:
+ fprintf(stderr, "%04d %08X CF NATIVE\n", id, bc->bytecode[id]);
+ fprintf(stderr, "%04d %08X CF NATIVE\n", id + 1, bc->bytecode[id + 1]);
+ break;
default:
R600_ERR("Unknown instruction %0x\n", cf->inst);
}