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authorJerome Glisse <[email protected]>2013-01-04 16:34:52 -0500
committerJerome Glisse <[email protected]>2013-01-07 11:06:07 -0500
commitca474f98f2cda5cb333e9f851c7e0e31c9a6f823 (patch)
tree8e046880ece999573bb7dae4b471156c96a06fcf /src/gallium/drivers/r600/r600_asm.c
parentd499ff98cd69c9ec6c43ad8ececa4c3b61889ab9 (diff)
radeon/winsys: move radeon family/class identification to winsys
Upcoming async dma support rely on winsys knowing about GPU families. Signed-off-by: Jerome Glisse <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/r600_asm.c')
-rw-r--r--src/gallium/drivers/r600/r600_asm.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c
index 268137ff2e7..ef677170a5b 100644
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src/gallium/drivers/r600/r600_asm.c
@@ -40,6 +40,7 @@ static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode *
return 3;
switch (bc->chip_class) {
+ default:
case R600:
case R700:
switch (alu->inst) {
@@ -201,8 +202,8 @@ static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode *
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_INT:
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_UINT:
return 1;
- default: R600_ERR(
- "Need instruction operand number for 0x%x.\n", alu->inst);
+ default:
+ R600_ERR("Need instruction operand number for 0x%x.\n", alu->inst);
}
break;
}