diff options
author | Alex Deucher <[email protected]> | 2013-04-24 12:26:52 -0400 |
---|---|---|
committer | Alex Deucher <[email protected]> | 2013-04-24 18:54:31 -0400 |
commit | 5bbeae7a3d3be17d44b1bc851872a107a75c393b (patch) | |
tree | 1f9910aa85a122f562b1e9ee0fb6a5c501910199 /src/gallium/drivers/r600/evergreend.h | |
parent | 9d0ad4c2f2eb89bab82194478180df570cc7aa4e (diff) |
r600g: use CP DMA for buffer clears on evergreen+
Lighter weight then using streamout. Only evergreen
and newer asics support embedded data as src with
CP DMA.
Reviewed-by: Jerome Glisse <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/evergreend.h')
-rw-r--r-- | src/gallium/drivers/r600/evergreend.h | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/src/gallium/drivers/r600/evergreend.h b/src/gallium/drivers/r600/evergreend.h index 53b68a44c9d..5d72432e630 100644 --- a/src/gallium/drivers/r600/evergreend.h +++ b/src/gallium/drivers/r600/evergreend.h @@ -118,6 +118,48 @@ #define PKT3_PREDICATE(x) (((x) >> 0) & 0x1) #define PKT0(index, count) (PKT_TYPE_S(0) | PKT0_BASE_INDEX_S(index) | PKT_COUNT_S(count)) +#define PKT3_CP_DMA 0x41 +/* 1. header + * 2. SRC_ADDR_LO [31:0] or DATA [31:0] + * 3. CP_SYNC [31] | SRC_SEL [30:29] | ENGINE [27] | DST_SEL [21:20] | SRC_ADDR_HI [7:0] + * 4. DST_ADDR_LO [31:0] + * 5. DST_ADDR_HI [7:0] + * 6. COMMAND [29:22] | BYTE_COUNT [20:0] + */ +#define PKT3_CP_DMA_CP_SYNC (1 << 31) +#define PKT3_CP_DMA_SRC_SEL(x) ((x) << 29) +/* 0 - SRC_ADDR + * 1 - GDS (program SAS to 1 as well) + * 2 - DATA + */ +#define PKT3_CP_DMA_DST_SEL(x) ((x) << 20) +/* 0 - DST_ADDR + * 1 - GDS (program DAS to 1 as well) + */ +/* COMMAND */ +#define PKT3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23) +/* 0 - none + * 1 - 8 in 16 + * 2 - 8 in 32 + * 3 - 8 in 64 + */ +#define PKT3_CP_DMA_CMD_DST_SWAP(x) ((x) << 24) +/* 0 - none + * 1 - 8 in 16 + * 2 - 8 in 32 + * 3 - 8 in 64 + */ +#define PKT3_CP_DMA_CMD_SAS (1 << 26) +/* 0 - memory + * 1 - register + */ +#define PKT3_CP_DMA_CMD_DAS (1 << 27) +/* 0 - memory + * 1 - register + */ +#define PKT3_CP_DMA_CMD_SAIC (1 << 28) +#define PKT3_CP_DMA_CMD_DAIC (1 << 29) + /* Registers */ #define R_0084FC_CP_STRMOUT_CNTL 0x000084FC #define S_0084FC_OFFSET_UPDATE_DONE(x) (((x) & 0x1) << 0) |