diff options
| author | Marek Olšák <[email protected]> | 2013-09-22 22:12:18 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2013-09-29 15:18:09 +0200 |
| commit | 1bb77f81db0ed3d1b3dd14c055ff7a9679399bb1 (patch) | |
| tree | 56e5d485d32449bf2065116f85883cf212731440 /src/gallium/drivers/r600/evergreen_state.c | |
| parent | 09fc5d6e262aeb1b21faf6d952c204588602ef97 (diff) | |
r600g,radeonsi: consolidate tiling_info initialization
and the util_format_s3tc_init calls too.
Diffstat (limited to 'src/gallium/drivers/r600/evergreen_state.c')
| -rw-r--r-- | src/gallium/drivers/r600/evergreen_state.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index 754c265c8c5..83cb02410df 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -1195,7 +1195,7 @@ evergreen_create_sampler_view_custom(struct pipe_context *ctx, if (util_format_get_blocksize(pipe_format) >= 16) non_disp_tiling = 1; } - nbanks = eg_num_banks(rscreen->tiling_info.num_banks); + nbanks = eg_num_banks(rscreen->b.tiling_info.num_banks); if (texture->target == PIPE_TEXTURE_1D_ARRAY) { height = 1; @@ -1348,7 +1348,7 @@ void evergreen_init_color_surface_rat(struct r600_context *rctx, unsigned block_size = align(util_format_get_blocksize(pipe_buffer->format), 4); unsigned pitch_alignment = - MAX2(64, rctx->screen->tiling_info.group_bytes / block_size); + MAX2(64, rctx->screen->b.tiling_info.group_bytes / block_size); unsigned pitch = align(pipe_buffer->width0, pitch_alignment); /* XXX: This is copied from evergreen_init_color_surface(). I don't @@ -1456,7 +1456,7 @@ void evergreen_init_color_surface(struct r600_context *rctx, if (util_format_get_blocksize(surf->base.format) >= 16) non_disp_tiling = 1; } - nbanks = eg_num_banks(rscreen->tiling_info.num_banks); + nbanks = eg_num_banks(rscreen->b.tiling_info.num_banks); desc = util_format_description(surf->base.format); for (i = 0; i < 4; i++) { if (desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) { @@ -1628,7 +1628,7 @@ static void evergreen_init_depth_surface(struct r600_context *rctx, macro_aspect = eg_macro_tile_aspect(macro_aspect); bankw = eg_bank_wh(bankw); bankh = eg_bank_wh(bankh); - nbanks = eg_num_banks(rscreen->tiling_info.num_banks); + nbanks = eg_num_banks(rscreen->b.tiling_info.num_banks); offset >>= 8; surf->db_depth_info = S_028040_ARRAY_MODE(array_mode) | @@ -3655,7 +3655,7 @@ static void evergreen_dma_copy_tile(struct r600_context *rctx, sub_cmd = 0x8; lbpp = util_logbase2(bpp); pitch_tile_max = ((pitch / bpp) >> 3) - 1; - nbanks = eg_num_banks(rctx->screen->tiling_info.num_banks); + nbanks = eg_num_banks(rctx->screen->b.tiling_info.num_banks); if (dst_mode == RADEON_SURF_MODE_LINEAR) { /* T2L */ |