diff options
| author | Marek Olšák <[email protected]> | 2012-10-05 04:59:50 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2012-10-10 00:16:42 +0200 |
| commit | ab075de53baa9829780cc133e5ac06e5498a763c (patch) | |
| tree | 13c225c22cd40002dc2dbf3c557ac1e66b71b3d8 /src/gallium/drivers/r600/evergreen_hw_context.c | |
| parent | a50edc8ed84c4c48c0dc8e1a079e8d5e8f1c3a0e (diff) | |
r600g: atomize polygon offset state
POLY_OFFSET_DB_FMT_CNTL is moved to the framebuffer state, because it only
depends on the zbuffer format.
Reviewed-by: Jerome Glisse <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/evergreen_hw_context.c')
| -rw-r--r-- | src/gallium/drivers/r600/evergreen_hw_context.c | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/src/gallium/drivers/r600/evergreen_hw_context.c b/src/gallium/drivers/r600/evergreen_hw_context.c index 57ebbb05bcb..35cd639c214 100644 --- a/src/gallium/drivers/r600/evergreen_hw_context.c +++ b/src/gallium/drivers/r600/evergreen_hw_context.c @@ -110,12 +110,7 @@ static const struct r600_reg evergreen_context_reg_list[] = { {R_028A48_PA_SC_MODE_CNTL_0, 0, 0}, {R_028ABC_DB_HTILE_SURFACE, 0, 0}, {R_028B54_VGT_SHADER_STAGES_EN, 0, 0}, - {R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL, 0, 0}, {R_028B7C_PA_SU_POLY_OFFSET_CLAMP, 0, 0}, - {R_028B80_PA_SU_POLY_OFFSET_FRONT_SCALE, 0, 0}, - {R_028B84_PA_SU_POLY_OFFSET_FRONT_OFFSET, 0, 0}, - {R_028B88_PA_SU_POLY_OFFSET_BACK_SCALE, 0, 0}, - {R_028B8C_PA_SU_POLY_OFFSET_BACK_OFFSET, 0, 0}, {R_028C08_PA_SU_VTX_CNTL, 0, 0}, }; @@ -205,12 +200,7 @@ static const struct r600_reg cayman_context_reg_list[] = { {R_028A48_PA_SC_MODE_CNTL_0, 0, 0}, {R_028ABC_DB_HTILE_SURFACE, 0, 0}, {R_028B54_VGT_SHADER_STAGES_EN, 0, 0}, - {R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL, 0, 0}, {R_028B7C_PA_SU_POLY_OFFSET_CLAMP, 0, 0}, - {R_028B80_PA_SU_POLY_OFFSET_FRONT_SCALE, 0, 0}, - {R_028B84_PA_SU_POLY_OFFSET_FRONT_OFFSET, 0, 0}, - {R_028B88_PA_SU_POLY_OFFSET_BACK_SCALE, 0, 0}, - {R_028B8C_PA_SU_POLY_OFFSET_BACK_OFFSET, 0, 0}, {CM_R_028BE4_PA_SU_VTX_CNTL, 0, 0}, }; |