diff options
| author | Jerome Glisse <[email protected]> | 2012-09-05 15:18:24 -0400 |
|---|---|---|
| committer | Jerome Glisse <[email protected]> | 2012-09-06 15:09:17 -0400 |
| commit | 5ceb87286f2e1b5b8527ba18a844abf450903175 (patch) | |
| tree | 920771a74e03a839d0cd81c8f6449d786842994e /src/gallium/drivers/r600/evergreen_compute.c | |
| parent | 935a72944751e6bc0a5df779eef44766c7b52baa (diff) | |
r600g: order atom emission v3
To avoid GPU lockup registers must be emited in a specific order
(no kidding ...). This patch rework atom emission so order in which
atom are emited in respect to each other is always the same. We
don't have any informations on what is the correct order so order
will need to be infered from fglrx command stream.
v2: add comment warning that atom order should not be taken lightly
v3: rebase on top of alphatest atom fix
Signed-off-by: Jerome Glisse <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/evergreen_compute.c')
| -rw-r--r-- | src/gallium/drivers/r600/evergreen_compute.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/r600/evergreen_compute.c b/src/gallium/drivers/r600/evergreen_compute.c index acf91ba43f3..35333120654 100644 --- a/src/gallium/drivers/r600/evergreen_compute.c +++ b/src/gallium/drivers/r600/evergreen_compute.c @@ -583,7 +583,7 @@ void evergreen_init_atom_start_compute_cs(struct r600_context *ctx) /* since all required registers are initialised in the * start_compute_cs_cmd atom, we can EMIT_EARLY here. */ - r600_init_command_buffer(cb, 256, EMIT_EARLY); + r600_init_command_buffer(ctx, cb, 1, 256); cb->pkt_flags = RADEON_CP_PACKET3_COMPUTE_MODE; switch (ctx->family) { |